Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2007-2008 |
| 4 | * Stelian Pop <stelian@popies.net> |
| 5 | * Lead Tech Design <www.leadtechdesign.com> |
| 6 | * |
| 7 | * (C) Copyright 2010 |
| 8 | * Achim Ehrlich <aehrlich@taskit.de> |
| 9 | * taskit GmbH <www.taskit.de> |
| 10 | * |
| 11 | * (C) Copyright 2012 |
| 12 | * Markus Hubig <mhubig@imko.de> |
| 13 | * IMKO GmbH <www.imko.de> |
| 14 | * |
| 15 | * (C) Copyright 2014 |
| 16 | * Heiko Schocher <hs@denx.de> |
| 17 | * DENX Software Engineering GmbH |
| 18 | * |
| 19 | * Configuation settings for the smartweb. |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 20 | */ |
| 21 | |
| 22 | #ifndef __CONFIG_H |
| 23 | #define __CONFIG_H |
| 24 | |
| 25 | /* |
| 26 | * SoC must be defined first, before hardware.h is included. |
| 27 | * In this case SoC is defined in boards.cfg. |
| 28 | */ |
| 29 | #include <asm/hardware.h> |
Heiko Schocher | cf5137c | 2015-09-08 11:52:52 +0200 | [diff] [blame] | 30 | #include <linux/sizes.h> |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 31 | |
| 32 | /* |
Simon Glass | 72cc538 | 2022-10-20 18:22:39 -0600 | [diff] [blame^] | 33 | * Warning: changing CONFIG_TEXT_BASE requires adapting the initial boot |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 34 | * program. Since the linker has to swallow that define, we must use a pure |
| 35 | * hex number here! |
| 36 | */ |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 37 | |
| 38 | /* ARM asynchronous clock */ |
| 39 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ |
| 40 | #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432MHz crystal */ |
| 41 | |
| 42 | /* misc settings */ |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 43 | |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 44 | /* |
| 45 | * SDRAM: 1 bank, 64 MB, base address 0x20000000 |
| 46 | * Already initialized before u-boot gets started. |
| 47 | */ |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 48 | #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 |
Heiko Schocher | cf5137c | 2015-09-08 11:52:52 +0200 | [diff] [blame] | 49 | #define CONFIG_SYS_SDRAM_SIZE (64 * SZ_1M) |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 50 | |
| 51 | /* |
| 52 | * Perform a SDRAM Memtest from the start of SDRAM |
| 53 | * till the beginning of the U-Boot position in RAM. |
| 54 | */ |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 55 | |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 56 | /* NAND flash settings */ |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 57 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 58 | #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 |
| 59 | #define CONFIG_SYS_NAND_DBW_8 |
| 60 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) |
| 61 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) |
| 62 | #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 |
| 63 | #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 |
| 64 | |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 65 | /* serial console */ |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 66 | #define CONFIG_USART_BASE ATMEL_BASE_DBGU |
| 67 | #define CONFIG_USART_ID ATMEL_ID_SYS |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 68 | |
Heiko Schocher | cf5137c | 2015-09-08 11:52:52 +0200 | [diff] [blame] | 69 | /* USB DFU support */ |
Heiko Schocher | cf5137c | 2015-09-08 11:52:52 +0200 | [diff] [blame] | 70 | |
Heiko Schocher | cf5137c | 2015-09-08 11:52:52 +0200 | [diff] [blame] | 71 | #define CONFIG_USB_GADGET_AT91 |
| 72 | |
| 73 | /* DFU class support */ |
Heiko Schocher | cf5137c | 2015-09-08 11:52:52 +0200 | [diff] [blame] | 74 | #define DFU_MANIFEST_POLL_TIMEOUT 25000 |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 75 | |
| 76 | /* General Boot Parameter */ |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 77 | |
| 78 | /* |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 79 | * Predefined environment variables. |
| 80 | * Usefull to define some easy to use boot commands. |
| 81 | */ |
| 82 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 83 | \ |
| 84 | "basicargs=console=ttyS0,115200\0" \ |
| 85 | \ |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 86 | |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 87 | /* |
| 88 | * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, |
| 89 | * leaving the correct space for initial global data structure above that |
| 90 | * address while providing maximum stack area below. |
| 91 | */ |
Tom Rini | 4ddbade | 2022-05-25 12:16:03 -0400 | [diff] [blame] | 92 | #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 |
| 93 | #define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1 |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 94 | |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 95 | /* Defines for SPL */ |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 96 | |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 97 | #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14) |
Heiko Schocher | cf5137c | 2015-09-08 11:52:52 +0200 | [diff] [blame] | 98 | #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K |
Simon Glass | 72cc538 | 2022-10-20 18:22:39 -0600 | [diff] [blame^] | 99 | #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE |
| 100 | #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 101 | |
Heiko Schocher | cf5137c | 2015-09-08 11:52:52 +0200 | [diff] [blame] | 102 | #define CONFIG_SYS_NAND_SIZE (SZ_256M) |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 103 | #define CONFIG_SYS_NAND_ECCSIZE 256 |
| 104 | #define CONFIG_SYS_NAND_ECCBYTES 3 |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 105 | #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ |
| 106 | 48, 49, 50, 51, 52, 53, 54, 55, \ |
| 107 | 56, 57, 58, 59, 60, 61, 62, 63, } |
| 108 | |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 109 | #define CONFIG_SYS_MASTER_CLOCK (198656000/2) |
| 110 | #define AT91_PLL_LOCK_TIMEOUT 1000000 |
| 111 | #define CONFIG_SYS_AT91_PLLA 0x2060bf09 |
| 112 | #define CONFIG_SYS_MCKR 0x100 |
| 113 | #define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR) |
| 114 | #define CONFIG_SYS_AT91_PLLB 0x10483f0e |
| 115 | |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 116 | #endif /* __CONFIG_H */ |