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git01.mediatek.com / filogic / uboot / 72cc53897fd104911dff82aefc3624757ebcecd0 / . / configs / mvebu_db-88f3720_defconfig
blob: 8b737840fa2ce64aa4c25697dcd90cca019a5467 [file] [log] [blame]
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]1CONFIG_ARM=y
Adam Fordd36b1022019-08-14 08:29:25 -0500[diff] [blame]2CONFIG_ARCH_CPU_INIT=y
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]3CONFIG_ARCH_MVEBU=y
Simon Glass72cc5382022-10-20 18:22:39 -0600[diff] [blame^]4CONFIG_TEXT_BASE=0x00000000
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]5CONFIG_NR_DRAM_BANKS=1
Konstantin Porotchkin7f8dfea2017-02-16 13:52:22 +0200[diff] [blame]6CONFIG_TARGET_MVEBU_ARMADA_37XX=y
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]7CONFIG_ENV_SIZE=0x10000
Konstantin Porotchkin855f5d32021-01-18 18:35:54 +0200[diff] [blame]8CONFIG_ENV_OFFSET=0x3f0000
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]9CONFIG_ENV_SECT_SIZE=0x10000
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]10CONFIG_DM_GPIO=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]11CONFIG_DEFAULT_DEVICE_TREE="armada-3720-db"
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]12CONFIG_DEBUG_UART_BASE=0xd0012000
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]13CONFIG_SYS_LOAD_ADDR=0x6000000
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]14CONFIG_DEBUG_UART=y
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]15CONFIG_AHCI=y
Tom Rini6c3798f2018-02-10 20:27:45 -0500[diff] [blame]16CONFIG_DISTRO_DEFAULTS=y
Tom Rini4ddbade2022-05-25 12:16:03 -0400[diff] [blame]17CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
18CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]19# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
Simon Glass4be229d2019-07-20 20:51:14 -0600[diff] [blame]20CONFIG_USE_PREBOOT=y
Simon Glassbd5618d2016-10-17 20:13:00 -0600[diff] [blame]21CONFIG_SYS_CONSOLE_INFO_QUIET=y
Lokesh Vutlafbad3702016-10-08 14:41:44 -0400[diff] [blame]22# CONFIG_DISPLAY_CPUINFO is not set
Lokesh Vutla94d95e42016-10-11 21:33:46 -0400[diff] [blame]23# CONFIG_DISPLAY_BOARDINFO is not set
Mario Sixf7055442018-03-28 14:38:17 +0200[diff] [blame]24CONFIG_DISPLAY_BOARDINFO_LATE=y
Simon Glass62adede2017-01-23 13:31:19 -0700[diff] [blame]25CONFIG_ARCH_EARLY_INIT_R=y
Simon Glass7a99a872017-01-23 13:31:20 -0700[diff] [blame]26CONFIG_BOARD_EARLY_INIT_F=y
Tom Riniba5c2b02022-05-11 16:21:06 -0400[diff] [blame]27CONFIG_SYS_MAXARGS=32
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]28# CONFIG_CMD_FLASH is not set
Pali Rohárc37f67e2022-02-23 14:15:46 +0100[diff] [blame]29CONFIG_CMD_FUSE=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]30CONFIG_CMD_GPIO=y
31CONFIG_CMD_I2C=y
Stefan Roeseb27d35e2016-12-09 15:13:35 +0100[diff] [blame]32CONFIG_CMD_MMC=y
Ken Ma71c37bc2018-03-26 15:57:32 +0800[diff] [blame]33CONFIG_CMD_PCI=y
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]34CONFIG_CMD_SPI=y
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]35CONFIG_CMD_USB=y
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]36# CONFIG_CMD_SETEXPR is not set
37CONFIG_CMD_TFTPPUT=y
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]38CONFIG_CMD_CACHE=y
39CONFIG_CMD_TIME=y
Tom Rini79f4eea2017-05-01 11:41:11 -0400[diff] [blame]40CONFIG_CMD_MVEBU_BUBT=y
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]41CONFIG_CMD_EXT4_WRITE=y
Patrick Delaunayc4bbbec2017-01-27 11:00:36 +0100[diff] [blame]42CONFIG_MAC_PARTITION=y
Adam Ford710966e2020-07-03 06:48:56 -0500[diff] [blame]43CONFIG_ENV_OVERWRITE=y
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]44CONFIG_ENV_IS_IN_SPI_FLASH=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]45CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Tom Rinia8a77502022-03-11 09:12:01 -0500[diff] [blame]46CONFIG_ARP_TIMEOUT=200
Tom Rini26011a32022-03-11 09:12:02 -0500[diff] [blame]47CONFIG_NET_RETRY_COUNT=50
Ken Ma1eeac422018-05-25 15:49:27 +0800[diff] [blame]48CONFIG_AHCI_MVEBU=y
Tom Rini3f004772022-06-10 22:59:28 -0400[diff] [blame]49CONFIG_LBA48=y
50CONFIG_SYS_64BIT_LBA=y
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]51CONFIG_CLK=y
52CONFIG_CLK_MVEBU=y
Stefan Roese0b57ab12017-05-17 17:05:38 +0200[diff] [blame]53# CONFIG_MVEBU_GPIO is not set
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]54CONFIG_DM_I2C=y
Marek Behún53929db2021-10-09 19:33:37 +0200[diff] [blame]55CONFIG_SYS_I2C_MV=y
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]56CONFIG_MISC=y
Stefan Roeseb27d35e2016-12-09 15:13:35 +0100[diff] [blame]57CONFIG_MMC_SDHCI=y
58CONFIG_MMC_SDHCI_SDMA=y
59CONFIG_MMC_SDHCI_XENON=y
Miquel Raynal2e35dbb2019-10-03 19:50:05 +0200[diff] [blame]60CONFIG_MTD=y
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]61CONFIG_SPI_FLASH_MACRONIX=y
62CONFIG_SPI_FLASH_SPANSION=y
63CONFIG_SPI_FLASH_STMICRO=y
64CONFIG_PHYLIB=y
Mario Sixf504d1a2018-04-27 14:52:21 +0200[diff] [blame]65CONFIG_PHY_MARVELL=y
Tom Rinica22e962017-08-07 22:00:34 -0400[diff] [blame]66CONFIG_PHY_GIGE=y
Ken Ma71c37bc2018-03-26 15:57:32 +0800[diff] [blame]67CONFIG_E1000=y
Wilson Ding945f6062018-03-26 15:57:30 +0800[diff] [blame]68CONFIG_PCI=y
Wilson Ding945f6062018-03-26 15:57:30 +0800[diff] [blame]69CONFIG_PCI_AARDVARK=y
Simon Glassc3fba302021-07-10 21:14:23 -0600[diff] [blame]70CONFIG_PHY=y
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]71CONFIG_MVEBU_COMPHY_SUPPORT=y
Stefan Roese0b57ab12017-05-17 17:05:38 +0200[diff] [blame]72CONFIG_PINCTRL=y
73CONFIG_PINCTRL_ARMADA_37XX=y
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]74CONFIG_MVEBU_A3700_UART=y
75CONFIG_MVEBU_A3700_SPI=y
76CONFIG_USB=y
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]77CONFIG_USB_XHCI_HCD=y
78CONFIG_USB_EHCI_HCD=y
Chris Packham547cf412017-08-28 20:50:45 +1200[diff] [blame]79CONFIG_USB_HOST_ETHER=y
Chris Packhamb110e112017-08-28 20:50:46 +1200[diff] [blame]80CONFIG_USB_ETHER_ASIX=y
81CONFIG_USB_ETHER_MCS7830=y
82CONFIG_USB_ETHER_RTL8152=y
83CONFIG_USB_ETHER_SMSC95XX=y
Tom Rini79f4eea2017-05-01 11:41:11 -0400[diff] [blame]84CONFIG_SHA1=y