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git01.mediatek.com / filogic / uboot / 72c5827f8f73526e8aead84d52aba9d65318f98e / . / board / freescale / imx93_evk / spl.c
blob: 1aa2977b409d34db437a37fc7945dbc31e184283 [file] [log] [blame]
Peng Fanb72606c2022-07-26 16:41:10 +0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2022 NXP
4 */
5
6#include <common.h>
7#include <command.h>
8#include <cpu_func.h>
9#include <hang.h>
10#include <image.h>
11#include <init.h>
12#include <log.h>
13#include <spl.h>
14#include <asm/global_data.h>
15#include <asm/io.h>
16#include <asm/arch/imx93_pins.h>
17#include <asm/arch/clock.h>
18#include <asm/arch/sys_proto.h>
19#include <asm/mach-imx/boot_mode.h>
20#include <asm/mach-imx/mxc_i2c.h>
21#include <asm/arch-mx7ulp/gpio.h>
22#include <asm/mach-imx/syscounter.h>
23#include <asm/mach-imx/s400_api.h>
24#include <dm/uclass.h>
25#include <dm/device.h>
26#include <dm/uclass-internal.h>
27#include <dm/device-internal.h>
28#include <linux/delay.h>
29#include <asm/arch/clock.h>
30#include <asm/arch/ccm_regs.h>
31#include <asm/arch/ddr.h>
32#include <power/pmic.h>
33#include <power/pca9450.h>
34#include <asm/arch/trdc.h>
35
36DECLARE_GLOBAL_DATA_PTR;
37
38int spl_board_boot_device(enum boot_device boot_dev_spl)
39{
40 return BOOT_DEVICE_BOOTROM;
41}
42
43void spl_board_init(void)
44{
45 puts("Normal Boot\n");
46}
47
48void spl_dram_init(void)
49{
50 ddr_init(&dram_timing);
51}
52
53#if CONFIG_IS_ENABLED(DM_PMIC_PCA9450)
54int power_init_board(void)
55{
56 struct udevice *dev;
57 int ret;
58
59 ret = pmic_get("pmic@25", &dev);
60 if (ret == -ENODEV) {
61 puts("No pca9450@25\n");
62 return 0;
63 }
64 if (ret != 0)
65 return ret;
66
67 /* BUCKxOUT_DVS0/1 control BUCK123 output */
68 pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);
69
70 /* 0.9v
71 */
72 pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x18);
73 pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x18);
74
75 /* I2C_LT_EN*/
76 pmic_reg_write(dev, 0xa, 0x3);
Peng Fanb72606c2022-07-26 16:41:10 +0800[diff] [blame]77 return 0;
78}
79#endif
80
81extern int imx9_probe_mu(void *ctx, struct event *event);
82void board_init_f(ulong dummy)
83{
84 int ret;
85
86 /* Clear the BSS. */
87 memset(__bss_start, 0, __bss_end - __bss_start);
88
89 timer_init();
90
91 arch_cpu_init();
92
93 board_early_init_f();
94
95 spl_early_init();
96
97 preloader_console_init();
98
99 ret = imx9_probe_mu(NULL, NULL);
100 if (ret) {
101 printf("Fail to init Sentinel API\n");
102 } else {
103 printf("SOC: 0x%x\n", gd->arch.soc_rev);
104 printf("LC: 0x%x\n", gd->arch.lifecycle);
105 }
106 power_init_board();
107
Peng Fan10fde4e2022-07-26 16:41:11 +0800[diff] [blame]108 /* 1.7GHz */
109 set_arm_clk(1700000000);
110
Peng Fanb72606c2022-07-26 16:41:10 +0800[diff] [blame]111 /* Init power of mix */
112 soc_power_init();
113
114 /* Setup TRDC for DDR access */
115 trdc_init();
116
117 /* DDR initialization */
118 spl_dram_init();
119
120 /* Put M33 into CPUWAIT for following kick */
121 ret = m33_prepare();
122 if (!ret)
123 printf("M33 prepare ok\n");
124
125 board_init_r(NULL, 0);
126}