blob: fdccd222dd4e439bc0eae2c8da95e01931b4bf86 [file] [log] [blame]
Lei Wen43013032011-02-09 18:06:58 +05301/*
2 * (C) Copyright 2011
3 * Marvell Semiconductor <www.marvell.com>
4 * Written-by: Lei Wen <leiwen@marvell.com>
5 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Lei Wen43013032011-02-09 18:06:58 +05307 */
8
9#ifndef _PANTHEON_CONFIG_H
10#define _PANTHEON_CONFIG_H
11
Lei Wen24f41da2011-10-18 19:21:33 +053012#include <asm/arch/pantheon.h>
13
Lei Wen43013032011-02-09 18:06:58 +053014#define CONFIG_ARM926EJS 1 /* Basic Architecture */
Lei Wen41ba02e2011-11-01 16:25:56 +053015/* default Dcache Line length for pantheon */
16#define CONFIG_SYS_CACHELINE_SIZE 32
Lei Wen43013032011-02-09 18:06:58 +053017
18#define CONFIG_SYS_TCLK (14745600) /* NS16550 clk config */
19#define CONFIG_SYS_HZ_CLOCK (3250000) /* Timer Freq. 3.25MHZ */
20#define CONFIG_MARVELL_MFP /* Enable mvmfp driver */
21#define MV_MFPR_BASE PANTHEON_MFPR_BASE
22#define MV_UART_CONSOLE_BASE PANTHEON_UART1_BASE
23#define CONFIG_SYS_NS16550_IER (1 << 6) /* Bit 6 in UART_IER register
24 represents UART Unit Enable */
Lei Wend10e3972011-04-13 23:48:34 +053025/*
26 * I2C definition
27 */
28#ifdef CONFIG_CMD_I2C
29#define CONFIG_I2C_MV 1
30#define CONFIG_MV_I2C_REG 0xd4011000
31#define CONFIG_HARD_I2C 1
32#define CONFIG_SYS_I2C_SPEED 0
33#define CONFIG_SYS_I2C_SLAVE 0xfe
34#endif
Lei Wen43013032011-02-09 18:06:58 +053035
Lei Wen7b727d02011-10-03 20:33:41 +000036/*
37 * MMC definition
38 */
39#ifdef CONFIG_CMD_MMC
40#define CONFIG_CMD_FAT 1
41#define CONFIG_MMC 1
42#define CONFIG_GENERIC_MMC 1
43#define CONFIG_SDHCI 1
44#define CONFIG_MMC_SDHCI_IO_ACCESSORS 1
45#define CONFIG_SYS_MMC_MAX_BLK_COUNT 0x1000
46#define CONFIG_MMC_SDMA 1
47#define CONFIG_MV_SDHCI 1
48#define CONFIG_DOS_PARTITION 1
49#define CONFIG_EFI_PARTITION 1
50#define CONFIG_SYS_MMC_NUM 2
51#define CONFIG_SYS_MMC_BASE {0xD4280000, 0xd4281000}
52#endif
53
Lei Wen43013032011-02-09 18:06:58 +053054#endif /* _PANTHEON_CONFIG_H */