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Tim Harvey256dba02021-03-02 14:00:21 -08001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright 2021 Gateworks Corporation
4 */
5
6#ifndef __IMX8MM_VENICE_H
7#define __IMX8MM_VENICE_H
8
9#include <asm/arch/imx-regs.h>
10#include <linux/sizes.h>
11
Tom Rini6a5dccc2022-11-16 13:10:41 -050012#define CFG_SYS_UBOOT_BASE \
Tim Harvey256dba02021-03-02 14:00:21 -080013 (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
14
15#ifdef CONFIG_SPL_BUILD
Tim Harvey256dba02021-03-02 14:00:21 -080016/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
Tom Rinifb52b942022-12-04 10:04:49 -050017#define CFG_MALLOC_F_ADDR 0x930000
Tim Harvey256dba02021-03-02 14:00:21 -080018#endif
19
Tim Harvey256dba02021-03-02 14:00:21 -080020/* Enable Distro Boot */
Tim Harvey256dba02021-03-02 14:00:21 -080021#define BOOT_TARGET_DEVICES(func) \
22 func(MMC, mmc, 1) \
23 func(MMC, mmc, 2) \
Tim Harveye9302ec2022-04-13 08:42:52 -070024 func(USB, usb, 0) \
25 func(USB, usb, 1) \
Tim Harvey256dba02021-03-02 14:00:21 -080026 func(DHCP, dhcp, na)
27#include <config_distro_bootcmd.h>
Tom Rinic9edebe2022-12-04 10:03:50 -050028#define CFG_EXTRA_ENV_SETTINGS \
Tim Harvey942bf432022-11-04 08:51:45 -070029 "splblk=0x42\0" \
30 BOOTENV
Tim Harvey256dba02021-03-02 14:00:21 -080031
Tom Rini6a5dccc2022-11-16 13:10:41 -050032#define CFG_SYS_INIT_RAM_ADDR 0x40000000
33#define CFG_SYS_INIT_RAM_SIZE SZ_2M
Tim Harvey256dba02021-03-02 14:00:21 -080034
Tom Rinibb4dd962022-11-16 13:10:37 -050035#define CFG_SYS_SDRAM_BASE 0x40000000
Tim Harvey256dba02021-03-02 14:00:21 -080036
37/* SDRAM configuration */
38#define PHYS_SDRAM 0x40000000
Tim Harvey56c5e312022-03-30 13:39:02 -070039#define PHYS_SDRAM_SIZE SZ_4G
Tim Harvey256dba02021-03-02 14:00:21 -080040
Tim Harvey256dba02021-03-02 14:00:21 -080041#endif