| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | * Hisilicon specific extensions to the Synopsys Designware Mobile |
| 2 | Storage Host Controller |
| 3 | |
| 4 | Read synopsys-dw-mshc.txt for more details |
| 5 | |
| 6 | The Synopsys designware mobile storage host controller is used to interface |
| 7 | a SoC with storage medium such as eMMC or SD/MMC cards. This file documents |
| 8 | differences between the core Synopsys dw mshc controller properties described |
| 9 | by synopsys-dw-mshc.txt and the properties used by the Hisilicon specific |
| 10 | extensions to the Synopsys Designware Mobile Storage Host Controller. |
| 11 | |
| 12 | Required Properties: |
| 13 | |
| 14 | * compatible: should be one of the following. |
| 15 | - "hisilicon,hi3660-dw-mshc": for controllers with hi3660 specific extensions. |
| 16 | - "hisilicon,hi3670-dw-mshc", "hisilicon,hi3660-dw-mshc": for controllers |
| 17 | with hi3670 specific extensions. |
| 18 | - "hisilicon,hi4511-dw-mshc": for controllers with hi4511 specific extensions. |
| 19 | - "hisilicon,hi6220-dw-mshc": for controllers with hi6220 specific extensions. |
| 20 | |
| 21 | Optional Properties: |
| 22 | - hisilicon,peripheral-syscon: phandle of syscon used to control peripheral. |
| 23 | |
| 24 | Example: |
| 25 | |
| 26 | /* for Hi3620 */ |
| 27 | |
| 28 | /* SoC portion */ |
| 29 | dwmmc_0: dwmmc0@fcd03000 { |
| 30 | compatible = "hisilicon,hi4511-dw-mshc"; |
| 31 | reg = <0xfcd03000 0x1000>; |
| 32 | interrupts = <0 16 4>; |
| 33 | #address-cells = <1>; |
| 34 | #size-cells = <0>; |
| 35 | clocks = <&mmc_clock HI3620_SD_CIUCLK>, <&clock HI3620_DDRC_PER_CLK>; |
| 36 | clock-names = "ciu", "biu"; |
| 37 | }; |
| 38 | |
| 39 | /* Board portion */ |
| 40 | dwmmc0@fcd03000 { |
| 41 | vmmc-supply = <&ldo12>; |
| 42 | fifo-depth = <0x100>; |
| 43 | pinctrl-names = "default"; |
| 44 | pinctrl-0 = <&sd_pmx_pins &sd_cfg_func1 &sd_cfg_func2>; |
| 45 | bus-width = <4>; |
| 46 | disable-wp; |
| 47 | cd-gpios = <&gpio10 3 0>; |
| 48 | cap-mmc-highspeed; |
| 49 | cap-sd-highspeed; |
| 50 | }; |
| 51 | |
| 52 | /* for Hi6220 */ |
| 53 | |
| 54 | dwmmc_1: dwmmc1@f723e000 { |
| 55 | compatible = "hisilicon,hi6220-dw-mshc"; |
| 56 | bus-width = <0x4>; |
| 57 | disable-wp; |
| 58 | cap-sd-highspeed; |
| 59 | sd-uhs-sdr12; |
| 60 | sd-uhs-sdr25; |
| 61 | card-detect-delay = <200>; |
| 62 | hisilicon,peripheral-syscon = <&ao_ctrl>; |
| 63 | reg = <0x0 0xf723e000 0x0 0x1000>; |
| 64 | interrupts = <0x0 0x49 0x4>; |
| 65 | clocks = <&clock_sys HI6220_MMC1_CIUCLK>, <&clock_sys HI6220_MMC1_CLK>; |
| 66 | clock-names = "ciu", "biu"; |
| 67 | cd-gpios = <&gpio1 0 1>; |
| 68 | pinctrl-names = "default", "idle"; |
| 69 | pinctrl-0 = <&sd_pmx_func &sd_clk_cfg_func &sd_cfg_func>; |
| 70 | pinctrl-1 = <&sd_pmx_idle &sd_clk_cfg_idle &sd_cfg_idle>; |
| 71 | vqmmc-supply = <&ldo7>; |
| 72 | vmmc-supply = <&ldo10>; |
| 73 | }; |