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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/dma/apple,admac.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Apple Audio DMA Controller (ADMAC)
8
9description: |
10 Apple's Audio DMA Controller (ADMAC) is used to fetch and store audio samples
11 on SoCs from the "Apple Silicon" family.
12
13 The controller has been seen with up to 24 channels. Even-numbered channels
14 are TX-only, odd-numbered are RX-only. Individual channels are coupled to
15 fixed device endpoints.
16
17maintainers:
18 - Martin PoviĊĦer <povik+lin@cutebit.org>
19
20allOf:
21 - $ref: dma-controller.yaml#
22
23properties:
24 compatible:
25 items:
26 - enum:
27 - apple,t6000-admac
28 - apple,t8103-admac
29 - apple,t8112-admac
30 - const: apple,admac
31
32 reg:
33 maxItems: 1
34
35 '#dma-cells':
36 const: 1
37 description:
38 Clients specify a single cell with channel number.
39
40 dma-channels:
41 maximum: 24
42
43 interrupts:
44 minItems: 4
45 maxItems: 4
46 description:
47 Interrupts that correspond to the 4 IRQ outputs of the controller. Usually
48 only one of the controller outputs will be connected as an usable interrupt
49 source. The remaining interrupts will be left without a valid value, e.g.
50 in an interrupts-extended list the disconnected positions will contain
51 an empty phandle reference <0>.
52
53 iommus:
54 minItems: 1
55 maxItems: 2
56
57 power-domains:
58 maxItems: 1
59
60 resets:
61 maxItems: 1
62
63required:
64 - compatible
65 - reg
66 - '#dma-cells'
67 - dma-channels
68 - interrupts
69
70additionalProperties: false
71
72examples:
73 - |
74 #include <dt-bindings/interrupt-controller/apple-aic.h>
75 #include <dt-bindings/interrupt-controller/irq.h>
76
77 aic: interrupt-controller {
78 interrupt-controller;
79 #interrupt-cells = <3>;
80 };
81
82 admac: dma-controller@238200000 {
83 compatible = "apple,t8103-admac", "apple,admac";
84 reg = <0x38200000 0x34000>;
85 dma-channels = <24>;
86 interrupts-extended = <0>,
87 <&aic AIC_IRQ 626 IRQ_TYPE_LEVEL_HIGH>,
88 <0>,
89 <0>;
90 #dma-cells = <1>;
91 };