Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/display/imx/fsl,imx-lcdc.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Freescale i.MX LCD Controller, found on i.MX1, i.MX21, i.MX25 and i.MX27 |
| 8 | |
| 9 | maintainers: |
| 10 | - Sascha Hauer <s.hauer@pengutronix.de> |
| 11 | - Pengutronix Kernel Team <kernel@pengutronix.de> |
| 12 | |
| 13 | properties: |
| 14 | compatible: |
| 15 | oneOf: |
| 16 | - enum: |
| 17 | - fsl,imx1-fb |
| 18 | - fsl,imx21-fb |
| 19 | - items: |
| 20 | - enum: |
| 21 | - fsl,imx25-fb |
| 22 | - fsl,imx27-fb |
| 23 | - const: fsl,imx21-fb |
| 24 | - items: |
| 25 | - const: fsl,imx25-lcdc |
| 26 | - const: fsl,imx21-lcdc |
| 27 | |
| 28 | clocks: |
| 29 | maxItems: 3 |
| 30 | |
| 31 | clock-names: |
| 32 | items: |
| 33 | - const: ipg |
| 34 | - const: ahb |
| 35 | - const: per |
| 36 | |
| 37 | port: |
| 38 | $ref: /schemas/graph.yaml#/properties/port |
| 39 | |
| 40 | display: |
| 41 | $ref: /schemas/types.yaml#/definitions/phandle |
| 42 | |
| 43 | interrupts: |
| 44 | maxItems: 1 |
| 45 | |
| 46 | reg: |
| 47 | maxItems: 1 |
| 48 | |
| 49 | lcd-supply: |
| 50 | description: |
| 51 | Regulator for LCD supply voltage. |
| 52 | |
| 53 | fsl,dmacr: |
| 54 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 55 | description: |
| 56 | Override value for DMA Control Register |
| 57 | |
| 58 | fsl,lpccr: |
| 59 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 60 | description: |
| 61 | Contrast Control Register value. |
| 62 | |
| 63 | fsl,lscr1: |
| 64 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 65 | description: |
| 66 | LCDC Sharp Configuration Register value. |
| 67 | |
| 68 | allOf: |
| 69 | - if: |
| 70 | properties: |
| 71 | compatible: |
| 72 | contains: |
| 73 | enum: |
| 74 | - fsl,imx1-lcdc |
| 75 | - fsl,imx21-lcdc |
| 76 | then: |
| 77 | properties: |
| 78 | display: false |
| 79 | fsl,dmacr: false |
| 80 | fsl,lpccr: false |
| 81 | fsl,lscr1: false |
| 82 | |
| 83 | required: |
| 84 | - port |
| 85 | |
| 86 | else: |
| 87 | properties: |
| 88 | port: false |
| 89 | |
| 90 | required: |
| 91 | - display |
| 92 | |
| 93 | required: |
| 94 | - compatible |
| 95 | - clocks |
| 96 | - clock-names |
| 97 | - interrupts |
| 98 | - reg |
| 99 | |
| 100 | additionalProperties: false |
| 101 | |
| 102 | examples: |
| 103 | - | |
| 104 | lcdc@53fbc000 { |
| 105 | compatible = "fsl,imx25-lcdc", "fsl,imx21-lcdc"; |
| 106 | reg = <0x53fbc000 0x4000>; |
| 107 | interrupts = <39>; |
| 108 | clocks = <&clks 103>, <&clks 66>, <&clks 49>; |
| 109 | clock-names = "ipg", "ahb", "per"; |
| 110 | |
| 111 | port { |
| 112 | parallel_out: endpoint { |
| 113 | remote-endpoint = <&panel_in>; |
| 114 | }; |
| 115 | }; |
| 116 | }; |
| 117 | - | |
| 118 | imxfb: fb@10021000 { |
| 119 | compatible = "fsl,imx21-fb"; |
| 120 | interrupts = <61>; |
| 121 | reg = <0x10021000 0x1000>; |
| 122 | display = <&display0>; |
| 123 | clocks = <&clks 103>, <&clks 49>, <&clks 66>; |
| 124 | clock-names = "ipg", "ahb", "per"; |
| 125 | }; |
| 126 | |
| 127 | display0: display0 { |
| 128 | model = "Primeview-PD050VL1"; |
| 129 | bits-per-pixel = <16>; |
| 130 | fsl,pcr = <0xf0c88080>; /* non-standard but required */ |
| 131 | |
| 132 | display-timings { |
| 133 | native-mode = <&timing_disp0>; |
| 134 | timing_disp0: timing0 { |
| 135 | hactive = <640>; |
| 136 | vactive = <480>; |
| 137 | hback-porch = <112>; |
| 138 | hfront-porch = <36>; |
| 139 | hsync-len = <32>; |
| 140 | vback-porch = <33>; |
| 141 | vfront-porch = <33>; |
| 142 | vsync-len = <2>; |
| 143 | clock-frequency = <25000000>; |
| 144 | }; |
| 145 | }; |
| 146 | }; |