Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0 |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/clock/allwinner,sun7i-a20-gmac-clk.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Allwinner A20 GMAC TX Clock |
| 8 | |
| 9 | maintainers: |
| 10 | - Chen-Yu Tsai <wens@csie.org> |
| 11 | - Maxime Ripard <mripard@kernel.org> |
| 12 | |
| 13 | properties: |
| 14 | "#clock-cells": |
| 15 | const: 0 |
| 16 | |
| 17 | compatible: |
| 18 | const: allwinner,sun7i-a20-gmac-clk |
| 19 | |
| 20 | reg: |
| 21 | maxItems: 1 |
| 22 | |
| 23 | clocks: |
| 24 | maxItems: 2 |
| 25 | description: > |
| 26 | The parent clocks shall be fixed rate dummy clocks at 25 MHz and |
| 27 | 125 MHz, respectively. |
| 28 | |
| 29 | clock-output-names: |
| 30 | maxItems: 1 |
| 31 | |
| 32 | required: |
| 33 | - "#clock-cells" |
| 34 | - compatible |
| 35 | - reg |
| 36 | - clocks |
| 37 | - clock-output-names |
| 38 | |
| 39 | additionalProperties: false |
| 40 | |
| 41 | examples: |
| 42 | - | |
| 43 | clk@1c20164 { |
| 44 | #clock-cells = <0>; |
| 45 | compatible = "allwinner,sun7i-a20-gmac-clk"; |
| 46 | reg = <0x01c20164 0x4>; |
| 47 | clocks = <&mii_phy_tx_clk>, <&gmac_int_tx_clk>; |
| 48 | clock-output-names = "gmac_tx"; |
| 49 | }; |
| 50 | |
| 51 | ... |