Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 71fa5b4a77cb90573917e7104a8f79247c171f3b / . / drivers / power / regulator / as3722_regulator.c
blob: ec0776b440bb8a80ffc4f375c156a68f9797d65b [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
Simon Glass8f189512017-07-25 08:30:10 -0600[diff] [blame]2/*
3 * Copyright (C) 2017 Google, Inc
4 * Written by Simon Glass <sjg@chromium.org>
5 *
6 * Placeholder regulator driver for as3722.
Simon Glass8f189512017-07-25 08:30:10 -0600[diff] [blame]7 */
8
9#include <common.h>
10#include <dm.h>
11#include <errno.h>
Simon Glass0f2af882020-05-10 11:40:05 -0600[diff] [blame]12#include <log.h>
Simon Glass8f189512017-07-25 08:30:10 -0600[diff] [blame]13#include <power/as3722.h>
14#include <power/pmic.h>
15#include <power/regulator.h>
16
Marcel Ziswileree107b32018-05-08 17:34:08 +0200[diff] [blame]17#define AS3722_LDO_CONTROL0_MAX_INDEX 7
18
Simon Glass8f189512017-07-25 08:30:10 -0600[diff] [blame]19static int stepdown_get_value(struct udevice *dev)
20{
21 return -ENOSYS;
22}
23
24static int stepdown_set_value(struct udevice *dev, int uvolt)
25{
26 return -ENOSYS;
27}
28
29static int stepdown_set_enable(struct udevice *dev, bool enable)
30{
31 struct udevice *pmic = dev_get_parent(dev);
32 int sd = dev->driver_data;
33 int ret;
34
35 ret = pmic_clrsetbits(pmic, AS3722_SD_CONTROL, 0, 1 << sd);
36 if (ret < 0) {
37 debug("%s: failed to write SD control register: %d", __func__,
38 ret);
39 return ret;
40 }
41
42 return 0;
43}
44
45static int stepdown_get_enable(struct udevice *dev)
46{
47 struct udevice *pmic = dev_get_parent(dev);
48 int sd = dev->driver_data;
49 int ret;
50
51 ret = pmic_reg_read(pmic, AS3722_SD_CONTROL);
52 if (ret < 0) {
53 debug("%s: failed to read SD control register: %d", __func__,
54 ret);
55 return ret;
56 }
57
58 return ret & (1 << sd) ? true : false;
59}
60
61static int ldo_get_value(struct udevice *dev)
62{
63 return -ENOSYS;
64}
65
66static int ldo_set_value(struct udevice *dev, int uvolt)
67{
68 return -ENOSYS;
69}
70
71static int ldo_set_enable(struct udevice *dev, bool enable)
72{
73 struct udevice *pmic = dev_get_parent(dev);
Marcel Ziswileree107b32018-05-08 17:34:08 +0200[diff] [blame]74 u8 ctrl_reg = AS3722_LDO_CONTROL0;
Simon Glass8f189512017-07-25 08:30:10 -0600[diff] [blame]75 int ldo = dev->driver_data;
76 int ret;
77
Marcel Ziswileree107b32018-05-08 17:34:08 +0200[diff] [blame]78 if (ldo > AS3722_LDO_CONTROL0_MAX_INDEX) {
79 ctrl_reg = AS3722_LDO_CONTROL1;
80 ldo -= 8;
81 }
82
83 ret = pmic_clrsetbits(pmic, ctrl_reg, !enable << ldo, enable << ldo);
Simon Glass8f189512017-07-25 08:30:10 -0600[diff] [blame]84 if (ret < 0) {
85 debug("%s: failed to write LDO control register: %d", __func__,
86 ret);
87 return ret;
88 }
89
90 return 0;
91}
92
93static int ldo_get_enable(struct udevice *dev)
94{
95 struct udevice *pmic = dev_get_parent(dev);
Marcel Ziswileree107b32018-05-08 17:34:08 +0200[diff] [blame]96 u8 ctrl_reg = AS3722_LDO_CONTROL0;
Simon Glass8f189512017-07-25 08:30:10 -0600[diff] [blame]97 int ldo = dev->driver_data;
98 int ret;
99
Marcel Ziswileree107b32018-05-08 17:34:08 +0200[diff] [blame]100 if (ldo > AS3722_LDO_CONTROL0_MAX_INDEX) {
101 ctrl_reg = AS3722_LDO_CONTROL1;
102 ldo -= 8;
103 }
104
105 ret = pmic_reg_read(pmic, ctrl_reg);
Simon Glass8f189512017-07-25 08:30:10 -0600[diff] [blame]106 if (ret < 0) {
107 debug("%s: failed to read SD control register: %d", __func__,
108 ret);
109 return ret;
110 }
111
112 return ret & (1 << ldo) ? true : false;
113}
114
115static int as3722_stepdown_probe(struct udevice *dev)
116{
Simon Glass71fa5b42020-12-03 16:55:18 -0700[diff] [blame^]117 struct dm_regulator_uclass_plat *uc_pdata;
Simon Glass8f189512017-07-25 08:30:10 -0600[diff] [blame]118
Simon Glass71fa5b42020-12-03 16:55:18 -0700[diff] [blame^]119 uc_pdata = dev_get_uclass_plat(dev);
Simon Glass8f189512017-07-25 08:30:10 -0600[diff] [blame]120
121 uc_pdata->type = REGULATOR_TYPE_BUCK;
122
123 return 0;
124}
125
126static int as3722_ldo_probe(struct udevice *dev)
127{
Simon Glass71fa5b42020-12-03 16:55:18 -0700[diff] [blame^]128 struct dm_regulator_uclass_plat *uc_pdata;
Simon Glass8f189512017-07-25 08:30:10 -0600[diff] [blame]129
Simon Glass71fa5b42020-12-03 16:55:18 -0700[diff] [blame^]130 uc_pdata = dev_get_uclass_plat(dev);
Simon Glass8f189512017-07-25 08:30:10 -0600[diff] [blame]131
132 uc_pdata->type = REGULATOR_TYPE_LDO;
133
134 return 0;
135}
136
137static const struct dm_regulator_ops as3722_stepdown_ops = {
138 .get_value = stepdown_get_value,
139 .set_value = stepdown_set_value,
140 .get_enable = stepdown_get_enable,
141 .set_enable = stepdown_set_enable,
142};
143
144static const struct dm_regulator_ops as3722_ldo_ops = {
145 .get_value = ldo_get_value,
146 .set_value = ldo_set_value,
147 .get_enable = ldo_get_enable,
148 .set_enable = ldo_set_enable,
149};
150
151U_BOOT_DRIVER(as3722_stepdown) = {
152 .name = "as3722_stepdown",
153 .id = UCLASS_REGULATOR,
154 .ops = &as3722_stepdown_ops,
155 .probe = as3722_stepdown_probe,
156};
157
158U_BOOT_DRIVER(as3722_ldo) = {
159 .name = "as3722_ldo",
160 .id = UCLASS_REGULATOR,
161 .ops = &as3722_ldo_ops,
162 .probe = as3722_ldo_probe,
163};