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wdenke85390d2002-04-01 14:29:03 +00001/*
2 * COM1 NS16550 support
Stefan Roese88fbf932010-04-15 16:07:28 +02003 * originally from linux source (arch/powerpc/boot/ns16550.c)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02004 * modified to use CONFIG_SYS_ISA_MEM and new defines
wdenke85390d2002-04-01 14:29:03 +00005 */
6
Simon Glasse98e01e2014-09-04 16:27:32 -06007#include <common.h>
Simon Glass79a9da32014-09-04 16:27:34 -06008#include <dm.h>
9#include <errno.h>
10#include <fdtdec.h>
wdenke85390d2002-04-01 14:29:03 +000011#include <ns16550.h>
Simon Glass79a9da32014-09-04 16:27:34 -060012#include <serial.h>
Ladislav Michlcc294422010-02-01 23:34:25 +010013#include <watchdog.h>
Graeme Russ14f06e62010-04-24 00:05:46 +100014#include <linux/types.h>
15#include <asm/io.h>
wdenke85390d2002-04-01 14:29:03 +000016
Simon Glass79a9da32014-09-04 16:27:34 -060017DECLARE_GLOBAL_DATA_PTR;
18
Detlev Zundel166fb542009-04-03 11:53:01 +020019#define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
20#define UART_MCRVAL (UART_MCR_DTR | \
21 UART_MCR_RTS) /* RTS/DTR */
22#define UART_FCRVAL (UART_FCR_FIFO_EN | \
23 UART_FCR_RXSR | \
24 UART_FCR_TXSR) /* Clear & enable FIFOs */
Simon Glass79a9da32014-09-04 16:27:34 -060025
26#ifndef CONFIG_DM_SERIAL
Graeme Russ14f06e62010-04-24 00:05:46 +100027#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
Simon Glassdd5497c2011-10-15 19:14:09 +000028#define serial_out(x, y) outb(x, (ulong)y)
29#define serial_in(y) inb((ulong)y)
Dave Aldridgea51bebc2011-09-01 22:47:14 +000030#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
Simon Glassdd5497c2011-10-15 19:14:09 +000031#define serial_out(x, y) out_be32(y, x)
32#define serial_in(y) in_be32(y)
Dave Aldridgea51bebc2011-09-01 22:47:14 +000033#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
Simon Glassdd5497c2011-10-15 19:14:09 +000034#define serial_out(x, y) out_le32(y, x)
35#define serial_in(y) in_le32(y)
Graeme Russ14f06e62010-04-24 00:05:46 +100036#else
Simon Glassdd5497c2011-10-15 19:14:09 +000037#define serial_out(x, y) writeb(x, y)
38#define serial_in(y) readb(y)
Graeme Russ14f06e62010-04-24 00:05:46 +100039#endif
Simon Glass79a9da32014-09-04 16:27:34 -060040#endif /* !CONFIG_DM_SERIAL */
wdenke85390d2002-04-01 14:29:03 +000041
Khoronzhuk, Ivan80902982014-07-16 00:59:25 +030042#if defined(CONFIG_SOC_KEYSTONE)
Vitaly Andrianov7bcf4d62014-04-04 13:16:53 -040043#define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0
44#define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0))
Karicheri, Muralidharancbc08882014-04-09 15:38:46 -040045#undef UART_MCRVAL
46#ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
47#define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE)
48#else
49#define UART_MCRVAL (UART_MCR_RTS)
50#endif
Vitaly Andrianov7bcf4d62014-04-04 13:16:53 -040051#endif
52
Prafulla Wadaskar66216372010-10-27 21:58:31 +053053#ifndef CONFIG_SYS_NS16550_IER
54#define CONFIG_SYS_NS16550_IER 0x00
55#endif /* CONFIG_SYS_NS16550_IER */
56
Simon Glass79a9da32014-09-04 16:27:34 -060057#ifdef CONFIG_DM_SERIAL
Simon Glass79a9da32014-09-04 16:27:34 -060058
Simon Glass6aba4fd2015-01-26 18:27:08 -070059static inline void serial_out_shift(unsigned char *addr, int shift, int value)
60{
Simon Glass79a9da32014-09-04 16:27:34 -060061#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
Simon Glass96e230b2014-10-10 07:49:13 -060062 outb(value, (ulong)addr);
Simon Glass79a9da32014-09-04 16:27:34 -060063#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
64 out_le32(addr, value);
65#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
66 out_be32(addr, value);
67#elif defined(CONFIG_SYS_BIG_ENDIAN)
Simon Glass6aba4fd2015-01-26 18:27:08 -070068 writeb(value, addr + (1 << shift) - 1);
Simon Glass79a9da32014-09-04 16:27:34 -060069#else
70 writeb(value, addr);
71#endif
72}
73
Simon Glass6aba4fd2015-01-26 18:27:08 -070074static inline int serial_in_shift(unsigned char *addr, int shift)
Simon Glass79a9da32014-09-04 16:27:34 -060075{
Simon Glass79a9da32014-09-04 16:27:34 -060076#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
Simon Glass96e230b2014-10-10 07:49:13 -060077 return inb((ulong)addr);
Simon Glass79a9da32014-09-04 16:27:34 -060078#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
79 return in_le32(addr);
80#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
81 return in_be32(addr);
82#elif defined(CONFIG_SYS_BIG_ENDIAN)
Simon Glass6aba4fd2015-01-26 18:27:08 -070083 return readb(addr + (1 << reg_shift) - 1);
Simon Glass79a9da32014-09-04 16:27:34 -060084#else
85 return readb(addr);
86#endif
87}
88
Simon Glass6aba4fd2015-01-26 18:27:08 -070089static void ns16550_writeb(NS16550_t port, int offset, int value)
90{
91 struct ns16550_platdata *plat = port->plat;
92 unsigned char *addr;
93
94 offset *= 1 << plat->reg_shift;
95 addr = map_sysmem(plat->base, 0) + offset;
96 /*
97 * As far as we know it doesn't make sense to support selection of
98 * these options at run-time, so use the existing CONFIG options.
99 */
100 serial_out_shift(addr, plat->reg_shift, value);
101}
102
103static int ns16550_readb(NS16550_t port, int offset)
104{
105 struct ns16550_platdata *plat = port->plat;
106 unsigned char *addr;
107
108 offset *= 1 << plat->reg_shift;
109 addr = map_sysmem(plat->base, 0) + offset;
110
111 return serial_in_shift(addr, plat->reg_shift);
112}
113
Simon Glass79a9da32014-09-04 16:27:34 -0600114/* We can clean these up once everything is moved to driver model */
115#define serial_out(value, addr) \
116 ns16550_writeb(com_port, addr - (unsigned char *)com_port, value)
117#define serial_in(addr) \
118 ns16550_readb(com_port, addr - (unsigned char *)com_port)
119#endif
120
Simon Glass27afb522015-01-26 18:27:09 -0700121static inline int calc_divisor(NS16550_t port, int clock, int baudrate)
Simon Glasse98e01e2014-09-04 16:27:32 -0600122{
123 const unsigned int mode_x_div = 16;
124
Simon Glass27afb522015-01-26 18:27:09 -0700125 return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate);
126}
127
128int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)
129{
Simon Glasse98e01e2014-09-04 16:27:32 -0600130#ifdef CONFIG_OMAP1510
131 /* If can't cleanly clock 115200 set div to 1 */
132 if ((clock == 12000000) && (baudrate == 115200)) {
133 port->osc_12m_sel = OSC_12M_SEL; /* enable 6.5 * divisor */
134 return 1; /* return 1 for base divisor */
135 }
136 port->osc_12m_sel = 0; /* clear if previsouly set */
137#endif
138
Simon Glass27afb522015-01-26 18:27:09 -0700139 return calc_divisor(port, clock, baudrate);
Simon Glasse98e01e2014-09-04 16:27:32 -0600140}
141
Simon Glassc31ebfe2014-09-04 16:27:33 -0600142static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)
143{
144 serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr);
145 serial_out(baud_divisor & 0xff, &com_port->dll);
146 serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
147 serial_out(UART_LCRVAL, &com_port->lcr);
148}
149
Simon Glassdd5497c2011-10-15 19:14:09 +0000150void NS16550_init(NS16550_t com_port, int baud_divisor)
wdenke85390d2002-04-01 14:29:03 +0000151{
Gregoire Gentil6b05d0a2014-11-10 11:04:10 -0800152#if (defined(CONFIG_SPL_BUILD) && \
153 (defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX)))
Manfred Huberf9b8ae32013-03-29 02:52:36 +0000154 /*
Gregoire Gentil6b05d0a2014-11-10 11:04:10 -0800155 * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
156 * before SPL starts only THRE bit is set. We have to empty the
157 * transmitter before initialization starts.
Manfred Huberf9b8ae32013-03-29 02:52:36 +0000158 */
159 if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE))
160 == UART_LSR_THRE) {
Simon Glass79a9da32014-09-04 16:27:34 -0600161 if (baud_divisor != -1)
162 NS16550_setbrg(com_port, baud_divisor);
Manfred Huberf9b8ae32013-03-29 02:52:36 +0000163 serial_out(0, &com_port->mdr1);
164 }
165#endif
166
Scott Wood6c6f0612012-09-18 18:19:05 -0500167 while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT))
168 ;
169
Prafulla Wadaskar66216372010-10-27 21:58:31 +0530170 serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
Tom Rinifc695e32013-12-20 11:19:33 -0500171#if defined(CONFIG_OMAP) || defined(CONFIG_AM33XX) || \
172 defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX)
Graeme Russ14f06e62010-04-24 00:05:46 +1000173 serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/
wdenk21136db2003-07-16 21:53:01 +0000174#endif
Simon Glassc31ebfe2014-09-04 16:27:33 -0600175 NS16550_setbrg(com_port, 0);
Graeme Russ14f06e62010-04-24 00:05:46 +1000176 serial_out(UART_MCRVAL, &com_port->mcr);
177 serial_out(UART_FCRVAL, &com_port->fcr);
Simon Glass79a9da32014-09-04 16:27:34 -0600178 if (baud_divisor != -1)
179 NS16550_setbrg(com_port, baud_divisor);
Masahiro Yamada641e3ce2014-07-30 19:11:41 +0900180#if defined(CONFIG_OMAP) || \
Matt Porter7967b1a2013-03-15 10:07:09 +0000181 defined(CONFIG_AM33XX) || defined(CONFIG_SOC_DA8XX) || \
TENART Antoinea6be77c2013-07-02 12:05:58 +0200182 defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX)
Chandan Nath7d744102011-10-14 02:58:26 +0000183
Simon Glassdd5497c2011-10-15 19:14:09 +0000184 /* /16 is proper to hit 115200 with 48MHz */
185 serial_out(0, &com_port->mdr1);
Mike Frysingerd0e97862009-02-11 20:26:52 -0500186#endif /* CONFIG_OMAP */
Khoronzhuk, Ivan80902982014-07-16 00:59:25 +0300187#if defined(CONFIG_SOC_KEYSTONE)
Vitaly Andrianov7bcf4d62014-04-04 13:16:53 -0400188 serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC);
189#endif
wdenke85390d2002-04-01 14:29:03 +0000190}
191
Ron Madriddfa028a2009-02-18 14:30:44 -0800192#ifndef CONFIG_NS16550_MIN_FUNCTIONS
Simon Glassdd5497c2011-10-15 19:14:09 +0000193void NS16550_reinit(NS16550_t com_port, int baud_divisor)
wdenke85390d2002-04-01 14:29:03 +0000194{
Prafulla Wadaskar66216372010-10-27 21:58:31 +0530195 serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
Simon Glassc31ebfe2014-09-04 16:27:33 -0600196 NS16550_setbrg(com_port, 0);
Graeme Russ14f06e62010-04-24 00:05:46 +1000197 serial_out(UART_MCRVAL, &com_port->mcr);
198 serial_out(UART_FCRVAL, &com_port->fcr);
Simon Glassc31ebfe2014-09-04 16:27:33 -0600199 NS16550_setbrg(com_port, baud_divisor);
wdenke85390d2002-04-01 14:29:03 +0000200}
Ron Madriddfa028a2009-02-18 14:30:44 -0800201#endif /* CONFIG_NS16550_MIN_FUNCTIONS */
wdenke85390d2002-04-01 14:29:03 +0000202
Simon Glassdd5497c2011-10-15 19:14:09 +0000203void NS16550_putc(NS16550_t com_port, char c)
wdenke85390d2002-04-01 14:29:03 +0000204{
Simon Glassdd5497c2011-10-15 19:14:09 +0000205 while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0)
206 ;
Graeme Russ14f06e62010-04-24 00:05:46 +1000207 serial_out(c, &com_port->thr);
Stefan Roese57b99882010-10-12 09:39:45 +0200208
209 /*
210 * Call watchdog_reset() upon newline. This is done here in putc
211 * since the environment code uses a single puts() to print the complete
212 * environment upon "printenv". So we can't put this watchdog call
213 * in puts().
214 */
215 if (c == '\n')
216 WATCHDOG_RESET();
wdenke85390d2002-04-01 14:29:03 +0000217}
218
Ron Madriddfa028a2009-02-18 14:30:44 -0800219#ifndef CONFIG_NS16550_MIN_FUNCTIONS
Simon Glassdd5497c2011-10-15 19:14:09 +0000220char NS16550_getc(NS16550_t com_port)
wdenke85390d2002-04-01 14:29:03 +0000221{
Graeme Russ14f06e62010-04-24 00:05:46 +1000222 while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) {
Marek Vasut9e1fca92012-09-15 10:25:19 +0200223#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY)
wdenk29e7f5a2004-03-12 00:14:09 +0000224 extern void usbtty_poll(void);
225 usbtty_poll();
226#endif
Ladislav Michlcc294422010-02-01 23:34:25 +0100227 WATCHDOG_RESET();
wdenk29e7f5a2004-03-12 00:14:09 +0000228 }
Graeme Russ14f06e62010-04-24 00:05:46 +1000229 return serial_in(&com_port->rbr);
wdenke85390d2002-04-01 14:29:03 +0000230}
231
Simon Glassdd5497c2011-10-15 19:14:09 +0000232int NS16550_tstc(NS16550_t com_port)
wdenke85390d2002-04-01 14:29:03 +0000233{
Simon Glassdd5497c2011-10-15 19:14:09 +0000234 return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
wdenke85390d2002-04-01 14:29:03 +0000235}
236
Ron Madriddfa028a2009-02-18 14:30:44 -0800237#endif /* CONFIG_NS16550_MIN_FUNCTIONS */
Simon Glass79a9da32014-09-04 16:27:34 -0600238
Simon Glass27afb522015-01-26 18:27:09 -0700239#ifdef CONFIG_DEBUG_UART_NS16550
240
241#include <debug_uart.h>
242
243void debug_uart_init(void)
244{
245 struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
246 int baud_divisor;
247
248 /*
249 * We copy the code from above because it is already horribly messy.
250 * Trying to refactor to nicely remove the duplication doesn't seem
251 * feasible. The better fix is to move all users of this driver to
252 * driver model.
253 */
254 baud_divisor = calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
255 CONFIG_BAUDRATE);
256
257 serial_out_shift(&com_port->ier, 0, CONFIG_SYS_NS16550_IER);
258 serial_out_shift(&com_port->mcr, 0, UART_MCRVAL);
259 serial_out_shift(&com_port->fcr, 0, UART_FCRVAL);
260
261 serial_out_shift(&com_port->lcr, 0, UART_LCR_BKSE | UART_LCRVAL);
262 serial_out_shift(&com_port->dll, 0, baud_divisor & 0xff);
263 serial_out_shift(&com_port->dlm, 0, (baud_divisor >> 8) & 0xff);
264 serial_out_shift(&com_port->lcr, 0, UART_LCRVAL);
265}
266
267static inline void _debug_uart_putc(int ch)
268{
269 struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
270
271 while (!(serial_in_shift(&com_port->lsr, 0) & UART_LSR_THRE))
272 ;
273 serial_out_shift(&com_port->thr, 0, ch);
274}
275
276DEBUG_UART_FUNCS
277
278#endif
279
Simon Glass79a9da32014-09-04 16:27:34 -0600280#ifdef CONFIG_DM_SERIAL
281static int ns16550_serial_putc(struct udevice *dev, const char ch)
282{
283 struct NS16550 *const com_port = dev_get_priv(dev);
284
285 if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
286 return -EAGAIN;
287 serial_out(ch, &com_port->thr);
288
289 /*
290 * Call watchdog_reset() upon newline. This is done here in putc
291 * since the environment code uses a single puts() to print the complete
292 * environment upon "printenv". So we can't put this watchdog call
293 * in puts().
294 */
295 if (ch == '\n')
296 WATCHDOG_RESET();
297
298 return 0;
299}
300
301static int ns16550_serial_pending(struct udevice *dev, bool input)
302{
303 struct NS16550 *const com_port = dev_get_priv(dev);
304
305 if (input)
306 return serial_in(&com_port->lsr) & UART_LSR_DR ? 1 : 0;
307 else
308 return serial_in(&com_port->lsr) & UART_LSR_THRE ? 0 : 1;
309}
310
311static int ns16550_serial_getc(struct udevice *dev)
312{
313 struct NS16550 *const com_port = dev_get_priv(dev);
314
Simon Glassddb958c2014-10-22 21:37:03 -0600315 if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
Simon Glass79a9da32014-09-04 16:27:34 -0600316 return -EAGAIN;
317
318 return serial_in(&com_port->rbr);
319}
320
321static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
322{
323 struct NS16550 *const com_port = dev_get_priv(dev);
324 struct ns16550_platdata *plat = com_port->plat;
325 int clock_divisor;
326
327 clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);
328
329 NS16550_setbrg(com_port, clock_divisor);
330
331 return 0;
332}
333
334int ns16550_serial_probe(struct udevice *dev)
335{
336 struct NS16550 *const com_port = dev_get_priv(dev);
337
Simon Glass3bf04f32014-10-22 21:37:05 -0600338 com_port->plat = dev_get_platdata(dev);
Simon Glass79a9da32014-09-04 16:27:34 -0600339 NS16550_init(com_port, -1);
340
341 return 0;
342}
343
Simon Glass3bf04f32014-10-22 21:37:05 -0600344#ifdef CONFIG_OF_CONTROL
Simon Glass79a9da32014-09-04 16:27:34 -0600345int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
346{
Simon Glass79a9da32014-09-04 16:27:34 -0600347 struct ns16550_platdata *plat = dev->platdata;
348 fdt_addr_t addr;
349
Bin Meng0203c1c2014-12-31 16:05:12 +0800350 /* try Processor Local Bus device first */
Simon Glass79a9da32014-09-04 16:27:34 -0600351 addr = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg");
Bin Meng0203c1c2014-12-31 16:05:12 +0800352#ifdef CONFIG_PCI
353 if (addr == FDT_ADDR_T_NONE) {
354 /* then try pci device */
355 struct fdt_pci_addr pci_addr;
356 u32 bar;
357 int ret;
358
359 /* we prefer to use a memory-mapped register */
360 ret = fdtdec_get_pci_addr(gd->fdt_blob, dev->of_offset,
361 FDT_PCI_SPACE_MEM32, "reg",
362 &pci_addr);
363 if (ret) {
364 /* try if there is any i/o-mapped register */
365 ret = fdtdec_get_pci_addr(gd->fdt_blob,
366 dev->of_offset,
367 FDT_PCI_SPACE_IO,
368 "reg", &pci_addr);
369 if (ret)
370 return ret;
371 }
372
373 ret = fdtdec_get_pci_bar32(gd->fdt_blob, dev->of_offset,
374 &pci_addr, &bar);
375 if (ret)
376 return ret;
377
378 addr = bar;
379 }
380#endif
381
Simon Glass79a9da32014-09-04 16:27:34 -0600382 if (addr == FDT_ADDR_T_NONE)
383 return -EINVAL;
384
Simon Glass25463942014-10-22 21:37:04 -0600385 plat->base = addr;
Simon Glass79a9da32014-09-04 16:27:34 -0600386 plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
387 "reg-shift", 1);
Simon Glass79a9da32014-09-04 16:27:34 -0600388
389 return 0;
390}
Simon Glass3bf04f32014-10-22 21:37:05 -0600391#endif
Simon Glass79a9da32014-09-04 16:27:34 -0600392
393const struct dm_serial_ops ns16550_serial_ops = {
394 .putc = ns16550_serial_putc,
395 .pending = ns16550_serial_pending,
396 .getc = ns16550_serial_getc,
397 .setbrg = ns16550_serial_setbrg,
398};
399#endif /* CONFIG_DM_SERIAL */