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Matthias Fuchs6f60bf32007-12-27 16:55:17 +01001/*
2 * (C) Copyright 2007
3 * Matthias Fuchs, esd gmbh, matthias.fuchs@esd-electronics.com.
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Matthias Fuchs6f60bf32007-12-27 16:55:17 +01006 */
7
8/*
9 * Epson RX8025 RTC driver.
10 */
11
12#include <common.h>
13#include <command.h>
14#include <rtc.h>
15#include <i2c.h>
16
Michal Simekc3e6c552008-07-14 19:45:37 +020017#if defined(CONFIG_CMD_DATE)
Matthias Fuchs6f60bf32007-12-27 16:55:17 +010018
19/*---------------------------------------------------------------------*/
20#undef DEBUG_RTC
21
22#ifdef DEBUG_RTC
23#define DEBUGR(fmt,args...) printf(fmt ,##args)
24#else
25#define DEBUGR(fmt,args...)
26#endif
27/*---------------------------------------------------------------------*/
28
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020029#ifndef CONFIG_SYS_I2C_RTC_ADDR
30# define CONFIG_SYS_I2C_RTC_ADDR 0x32
Matthias Fuchs6f60bf32007-12-27 16:55:17 +010031#endif
32
33/*
34 * RTC register addresses
35 */
36#define RTC_SEC_REG_ADDR 0x00
37#define RTC_MIN_REG_ADDR 0x01
38#define RTC_HR_REG_ADDR 0x02
39#define RTC_DAY_REG_ADDR 0x03
40#define RTC_DATE_REG_ADDR 0x04
41#define RTC_MON_REG_ADDR 0x05
42#define RTC_YR_REG_ADDR 0x06
43
44#define RTC_CTL1_REG_ADDR 0x0e
45#define RTC_CTL2_REG_ADDR 0x0f
46
47/*
48 * Control register 1 bits
49 */
50#define RTC_CTL1_BIT_2412 0x20
51
52/*
53 * Control register 2 bits
54 */
55#define RTC_CTL2_BIT_PON 0x10
56#define RTC_CTL2_BIT_VDET 0x40
57#define RTC_CTL2_BIT_XST 0x20
58#define RTC_CTL2_BIT_VDSL 0x80
59
60/*
61 * Note: the RX8025 I2C RTC requires register
62 * reads and write to consist of a single bus
63 * cycle. It is not allowed to write the register
64 * address in a first cycle that is terminated by
65 * a STOP condition. The chips needs a 'restart'
66 * sequence (start sequence without a prior stop).
67 * This driver has been written for a 4xx board.
68 * U-Boot's 4xx i2c driver is currently not capable
69 * to generate such cycles to some work arounds
70 * are used.
71 */
72
73/* static uchar rtc_read (uchar reg); */
74#define rtc_read(reg) buf[((reg) + 1) & 0xf]
75
76static void rtc_write (uchar reg, uchar val);
Matthias Fuchs6f60bf32007-12-27 16:55:17 +010077
78/*
79 * Get the current time from the RTC
80 */
Yuri Tikhonov9bacd942008-03-20 17:56:04 +030081int rtc_get (struct rtc_time *tmp)
Matthias Fuchs6f60bf32007-12-27 16:55:17 +010082{
Yuri Tikhonov9bacd942008-03-20 17:56:04 +030083 int rel = 0;
Matthias Fuchs6f60bf32007-12-27 16:55:17 +010084 uchar sec, min, hour, mday, wday, mon, year, ctl2;
85 uchar buf[16];
86
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020087 if (i2c_read(CONFIG_SYS_I2C_RTC_ADDR, 0, 0, buf, 16))
Matthias Fuchs6f60bf32007-12-27 16:55:17 +010088 printf("Error reading from RTC\n");
89
90 sec = rtc_read(RTC_SEC_REG_ADDR);
91 min = rtc_read(RTC_MIN_REG_ADDR);
92 hour = rtc_read(RTC_HR_REG_ADDR);
93 wday = rtc_read(RTC_DAY_REG_ADDR);
94 mday = rtc_read(RTC_DATE_REG_ADDR);
95 mon = rtc_read(RTC_MON_REG_ADDR);
96 year = rtc_read(RTC_YR_REG_ADDR);
97
98 DEBUGR ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
99 "hr: %02x min: %02x sec: %02x\n",
100 year, mon, mday, wday, hour, min, sec);
101
102 /* dump status */
103 ctl2 = rtc_read(RTC_CTL2_REG_ADDR);
Yuri Tikhonov9bacd942008-03-20 17:56:04 +0300104 if (ctl2 & RTC_CTL2_BIT_PON) {
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100105 printf("RTC: power-on detected\n");
Yuri Tikhonov9bacd942008-03-20 17:56:04 +0300106 rel = -1;
107 }
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100108
Yuri Tikhonov9bacd942008-03-20 17:56:04 +0300109 if (ctl2 & RTC_CTL2_BIT_VDET) {
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100110 printf("RTC: voltage drop detected\n");
Yuri Tikhonov9bacd942008-03-20 17:56:04 +0300111 rel = -1;
112 }
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100113
Yuri Tikhonov9bacd942008-03-20 17:56:04 +0300114 if (!(ctl2 & RTC_CTL2_BIT_XST)) {
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100115 printf("RTC: oscillator stop detected\n");
Yuri Tikhonov9bacd942008-03-20 17:56:04 +0300116 rel = -1;
117 }
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100118
119 tmp->tm_sec = bcd2bin (sec & 0x7F);
120 tmp->tm_min = bcd2bin (min & 0x7F);
Yuri Tikhonov62a34592008-08-15 15:42:09 +0200121 if (rtc_read(RTC_CTL1_REG_ADDR) & RTC_CTL1_BIT_2412)
122 tmp->tm_hour = bcd2bin (hour & 0x3F);
123 else
124 tmp->tm_hour = bcd2bin (hour & 0x1F) % 12 +
125 ((hour & 0x20) ? 12 : 0);
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100126 tmp->tm_mday = bcd2bin (mday & 0x3F);
127 tmp->tm_mon = bcd2bin (mon & 0x1F);
128 tmp->tm_year = bcd2bin (year) + ( bcd2bin (year) >= 70 ? 1900 : 2000);
129 tmp->tm_wday = bcd2bin (wday & 0x07);
130 tmp->tm_yday = 0;
131 tmp->tm_isdst= 0;
132
133 DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
134 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
135 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
Yuri Tikhonov9bacd942008-03-20 17:56:04 +0300136
137 return rel;
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100138}
139
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100140/*
141 * Set the RTC
142 */
Jean-Christophe PLAGNIOL-VILLARD97a2e102008-09-01 23:06:23 +0200143int rtc_set (struct rtc_time *tmp)
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100144{
145 DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
146 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
147 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
148
149 if (tmp->tm_year < 1970 || tmp->tm_year > 2069)
150 printf("WARNING: year should be between 1970 and 2069!\n");
151
152 rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100));
153 rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon));
154 rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday));
155 rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday));
156 rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour));
157 rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min));
158 rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec));
159
160 rtc_write (RTC_CTL1_REG_ADDR, RTC_CTL1_BIT_2412);
Jean-Christophe PLAGNIOL-VILLARD97a2e102008-09-01 23:06:23 +0200161
162 return 0;
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100163}
164
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100165/*
Chris Packham7c105e42018-03-21 15:40:37 +1300166 * Reset the RTC
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100167 */
168void rtc_reset (void)
169{
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100170 uchar buf[16];
171 uchar ctl2;
172
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200173 if (i2c_read(CONFIG_SYS_I2C_RTC_ADDR, 0, 0, buf, 16))
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100174 printf("Error reading from RTC\n");
175
176 ctl2 = rtc_read(RTC_CTL2_REG_ADDR);
177 ctl2 &= ~(RTC_CTL2_BIT_PON | RTC_CTL2_BIT_VDET);
178 ctl2 |= RTC_CTL2_BIT_XST | RTC_CTL2_BIT_VDSL;
179 rtc_write (RTC_CTL2_REG_ADDR, ctl2);
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100180}
181
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100182/*
183 * Helper functions
184 */
185static void rtc_write (uchar reg, uchar val)
186{
187 uchar buf[2];
188 buf[0] = reg << 4;
189 buf[1] = val;
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200190 if (i2c_write(CONFIG_SYS_I2C_RTC_ADDR, 0, 0, buf, 2) != 0)
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100191 printf("Error writing to RTC\n");
192
193}
194
Jean-Christophe PLAGNIOL-VILLARD41348722008-01-25 07:54:47 +0100195#endif /* CONFIG_RTC_RX8025 && CONFIG_CMD_DATE */