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Stefan Roese75659da2015-07-23 10:26:16 +02001#ifndef __ASM_ARCH_PXA3XX_NAND_H
2#define __ASM_ARCH_PXA3XX_NAND_H
3
4#include <linux/mtd/mtd.h>
5#include <linux/mtd/partitions.h>
6
7struct pxa3xx_nand_timing {
8 unsigned int tCH; /* Enable signal hold time */
9 unsigned int tCS; /* Enable signal setup time */
10 unsigned int tWH; /* ND_nWE high duration */
11 unsigned int tWP; /* ND_nWE pulse time */
12 unsigned int tRH; /* ND_nRE high duration */
13 unsigned int tRP; /* ND_nRE pulse width */
14 unsigned int tR; /* ND_nWE high to ND_nRE low for read */
15 unsigned int tWHR; /* ND_nWE high to ND_nRE low for status read */
16 unsigned int tAR; /* ND_ALE low to ND_nRE low delay */
17};
18
19struct pxa3xx_nand_flash {
20 uint32_t chip_id;
21 unsigned int flash_width; /* Width of Flash memory (DWIDTH_M) */
22 unsigned int dfc_width; /* Width of flash controller(DWIDTH_C) */
23 struct pxa3xx_nand_timing *timing; /* NAND Flash timing */
24};
25
26/*
27 * Current pxa3xx_nand controller has two chip select which
28 * both be workable.
29 *
30 * Notice should be taken that:
31 * When you want to use this feature, you should not enable the
32 * keep configuration feature, for two chip select could be
33 * attached with different nand chip. The different page size
34 * and timing requirement make the keep configuration impossible.
35 */
36
37/* The max num of chip select current support */
38#define NUM_CHIP_SELECT (2)
39struct pxa3xx_nand_platform_data {
40 /* the data flash bus is shared between the Static Memory
41 * Controller and the Data Flash Controller, the arbiter
42 * controls the ownership of the bus
43 */
44 int enable_arbiter;
45
46 /* allow platform code to keep OBM/bootloader defined NFC config */
47 int keep_config;
48
49 /* indicate how many chip selects will be used */
50 int num_cs;
51
52 /* use an flash-based bad block table */
53 bool flash_bbt;
54
55 /* requested ECC strength and ECC step size */
56 int ecc_strength, ecc_step_size;
57
58 const struct mtd_partition *parts[NUM_CHIP_SELECT];
59 unsigned int nr_parts[NUM_CHIP_SELECT];
60
61 const struct pxa3xx_nand_flash *flash;
62 size_t num_flash;
63};
64#endif /* __ASM_ARCH_PXA3XX_NAND_H */