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git01.mediatek.com / filogic / uboot / 71c88eba5ebea4baae1d1c8d8acb657dbe6e1010 / . / drivers / serial / ns16550.c
blob: facadd2f5c3e31f59f09829c46a22cc4feb022e4 [file] [log] [blame]
wdenke85390d2002-04-01 14:29:03 +0000[diff] [blame]1/*
2 * COM1 NS16550 support
Stefan Roese88fbf932010-04-15 16:07:28 +0200[diff] [blame]3 * originally from linux source (arch/powerpc/boot/ns16550.c)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200[diff] [blame]4 * modified to use CONFIG_SYS_ISA_MEM and new defines
wdenke85390d2002-04-01 14:29:03 +0000[diff] [blame]5 */
6
7#include <config.h>
wdenke85390d2002-04-01 14:29:03 +0000[diff] [blame]8#include <ns16550.h>
Ladislav Michlcc294422010-02-01 23:34:25 +0100[diff] [blame]9#include <watchdog.h>
Graeme Russ14f06e62010-04-24 00:05:46 +1000[diff] [blame]10#include <linux/types.h>
11#include <asm/io.h>
wdenke85390d2002-04-01 14:29:03 +0000[diff] [blame]12
Detlev Zundel166fb542009-04-03 11:53:01 +0200[diff] [blame]13#define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
14#define UART_MCRVAL (UART_MCR_DTR | \
15 UART_MCR_RTS) /* RTS/DTR */
16#define UART_FCRVAL (UART_FCR_FIFO_EN | \
17 UART_FCR_RXSR | \
18 UART_FCR_TXSR) /* Clear & enable FIFOs */
Graeme Russ14f06e62010-04-24 00:05:46 +1000[diff] [blame]19#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
Simon Glassdd5497c2011-10-15 19:14:09 +0000[diff] [blame]20#define serial_out(x, y) outb(x, (ulong)y)
21#define serial_in(y) inb((ulong)y)
Dave Aldridgea51bebc2011-09-01 22:47:14 +0000[diff] [blame]22#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
Simon Glassdd5497c2011-10-15 19:14:09 +0000[diff] [blame]23#define serial_out(x, y) out_be32(y, x)
24#define serial_in(y) in_be32(y)
Dave Aldridgea51bebc2011-09-01 22:47:14 +0000[diff] [blame]25#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
Simon Glassdd5497c2011-10-15 19:14:09 +0000[diff] [blame]26#define serial_out(x, y) out_le32(y, x)
27#define serial_in(y) in_le32(y)
Graeme Russ14f06e62010-04-24 00:05:46 +1000[diff] [blame]28#else
Simon Glassdd5497c2011-10-15 19:14:09 +0000[diff] [blame]29#define serial_out(x, y) writeb(x, y)
30#define serial_in(y) readb(y)
Graeme Russ14f06e62010-04-24 00:05:46 +1000[diff] [blame]31#endif
wdenke85390d2002-04-01 14:29:03 +0000[diff] [blame]32
Prafulla Wadaskar66216372010-10-27 21:58:31 +0530[diff] [blame]33#ifndef CONFIG_SYS_NS16550_IER
34#define CONFIG_SYS_NS16550_IER 0x00
35#endif /* CONFIG_SYS_NS16550_IER */
36
Simon Glassdd5497c2011-10-15 19:14:09 +0000[diff] [blame]37void NS16550_init(NS16550_t com_port, int baud_divisor)
wdenke85390d2002-04-01 14:29:03 +0000[diff] [blame]38{
Prafulla Wadaskar66216372010-10-27 21:58:31 +0530[diff] [blame]39 serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
Chandan Nath7d744102011-10-14 02:58:26 +0000[diff] [blame]40#if (defined(CONFIG_OMAP) && !defined(CONFIG_OMAP3_ZOOM2)) || \
41 defined(CONFIG_AM33XX)
Graeme Russ14f06e62010-04-24 00:05:46 +1000[diff] [blame]42 serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/
wdenk21136db2003-07-16 21:53:01 +0000[diff] [blame]43#endif
Graeme Russ14f06e62010-04-24 00:05:46 +1000[diff] [blame]44 serial_out(UART_LCR_BKSE | UART_LCRVAL, (ulong)&com_port->lcr);
45 serial_out(0, &com_port->dll);
46 serial_out(0, &com_port->dlm);
47 serial_out(UART_LCRVAL, &com_port->lcr);
48 serial_out(UART_MCRVAL, &com_port->mcr);
49 serial_out(UART_FCRVAL, &com_port->fcr);
50 serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr);
51 serial_out(baud_divisor & 0xff, &com_port->dll);
52 serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
53 serial_out(UART_LCRVAL, &com_port->lcr);
Chandan Nath7d744102011-10-14 02:58:26 +0000[diff] [blame]54#if (defined(CONFIG_OMAP) && !defined(CONFIG_OMAP3_ZOOM2)) || \
Mikhail Kshevetskiyf9da3a32012-07-09 08:52:43 +0000[diff] [blame]55 defined(CONFIG_AM33XX) || defined(CONFIG_SOC_DA8XX)
Chandan Nath7d744102011-10-14 02:58:26 +0000[diff] [blame]56
wdenkf8062712005-01-09 23:16:25 +0000[diff] [blame]57#if defined(CONFIG_APTIX)
Simon Glassdd5497c2011-10-15 19:14:09 +0000[diff] [blame]58 /* /13 mode so Aptix 6MHz can hit 115200 */
59 serial_out(3, &com_port->mdr1);
wdenkf8062712005-01-09 23:16:25 +0000[diff] [blame]60#else
Simon Glassdd5497c2011-10-15 19:14:09 +0000[diff] [blame]61 /* /16 is proper to hit 115200 with 48MHz */
62 serial_out(0, &com_port->mdr1);
wdenkf8062712005-01-09 23:16:25 +0000[diff] [blame]63#endif
Mike Frysingerd0e97862009-02-11 20:26:52 -0500[diff] [blame]64#endif /* CONFIG_OMAP */
wdenke85390d2002-04-01 14:29:03 +0000[diff] [blame]65}
66
Ron Madriddfa028a2009-02-18 14:30:44 -0800[diff] [blame]67#ifndef CONFIG_NS16550_MIN_FUNCTIONS
Simon Glassdd5497c2011-10-15 19:14:09 +0000[diff] [blame]68void NS16550_reinit(NS16550_t com_port, int baud_divisor)
wdenke85390d2002-04-01 14:29:03 +0000[diff] [blame]69{
Prafulla Wadaskar66216372010-10-27 21:58:31 +0530[diff] [blame]70 serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
Graeme Russ14f06e62010-04-24 00:05:46 +1000[diff] [blame]71 serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr);
72 serial_out(0, &com_port->dll);
73 serial_out(0, &com_port->dlm);
74 serial_out(UART_LCRVAL, &com_port->lcr);
75 serial_out(UART_MCRVAL, &com_port->mcr);
76 serial_out(UART_FCRVAL, &com_port->fcr);
77 serial_out(UART_LCR_BKSE, &com_port->lcr);
78 serial_out(baud_divisor & 0xff, &com_port->dll);
79 serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
80 serial_out(UART_LCRVAL, &com_port->lcr);
wdenke85390d2002-04-01 14:29:03 +0000[diff] [blame]81}
Ron Madriddfa028a2009-02-18 14:30:44 -0800[diff] [blame]82#endif /* CONFIG_NS16550_MIN_FUNCTIONS */
wdenke85390d2002-04-01 14:29:03 +0000[diff] [blame]83
Simon Glassdd5497c2011-10-15 19:14:09 +0000[diff] [blame]84void NS16550_putc(NS16550_t com_port, char c)
wdenke85390d2002-04-01 14:29:03 +0000[diff] [blame]85{
Simon Glassdd5497c2011-10-15 19:14:09 +0000[diff] [blame]86 while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0)
87 ;
Graeme Russ14f06e62010-04-24 00:05:46 +1000[diff] [blame]88 serial_out(c, &com_port->thr);
Stefan Roese57b99882010-10-12 09:39:45 +0200[diff] [blame]89
90 /*
91 * Call watchdog_reset() upon newline. This is done here in putc
92 * since the environment code uses a single puts() to print the complete
93 * environment upon "printenv". So we can't put this watchdog call
94 * in puts().
95 */
96 if (c == '\n')
97 WATCHDOG_RESET();
wdenke85390d2002-04-01 14:29:03 +0000[diff] [blame]98}
99
Ron Madriddfa028a2009-02-18 14:30:44 -0800[diff] [blame]100#ifndef CONFIG_NS16550_MIN_FUNCTIONS
Simon Glassdd5497c2011-10-15 19:14:09 +0000[diff] [blame]101char NS16550_getc(NS16550_t com_port)
wdenke85390d2002-04-01 14:29:03 +0000[diff] [blame]102{
Graeme Russ14f06e62010-04-24 00:05:46 +1000[diff] [blame]103 while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) {
wdenk29e7f5a2004-03-12 00:14:09 +0000[diff] [blame]104#ifdef CONFIG_USB_TTY
105 extern void usbtty_poll(void);
106 usbtty_poll();
107#endif
Ladislav Michlcc294422010-02-01 23:34:25 +0100[diff] [blame]108 WATCHDOG_RESET();
wdenk29e7f5a2004-03-12 00:14:09 +0000[diff] [blame]109 }
Graeme Russ14f06e62010-04-24 00:05:46 +1000[diff] [blame]110 return serial_in(&com_port->rbr);
wdenke85390d2002-04-01 14:29:03 +0000[diff] [blame]111}
112
Simon Glassdd5497c2011-10-15 19:14:09 +0000[diff] [blame]113int NS16550_tstc(NS16550_t com_port)
wdenke85390d2002-04-01 14:29:03 +0000[diff] [blame]114{
Simon Glassdd5497c2011-10-15 19:14:09 +0000[diff] [blame]115 return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
wdenke85390d2002-04-01 14:29:03 +0000[diff] [blame]116}
117
Ron Madriddfa028a2009-02-18 14:30:44 -0800[diff] [blame]118#endif /* CONFIG_NS16550_MIN_FUNCTIONS */