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wdenk5f495752004-02-26 23:46:20 +00001/*
2 * URB OHCI HCD (Host Controller Driver) for USB on the MPC5200.
3 *
4 * (C) Copyright 2003-2004
Detlev Zundelf1b3f2b2009-05-13 10:54:10 +02005 * Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
wdenk5f495752004-02-26 23:46:20 +00006 *
7 * (C) Copyright 2004
8 * Pierre Aubert, Staubli Faverges <p.aubert@staubli.com>
9 *
wdenkbfad55d2005-03-14 23:56:42 +000010 * Note: Much of this code has been derived from Linux 2.4
11 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
12 * (C) Copyright 2000-2002 David Brownell
13 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +020014 * SPDX-License-Identifier: GPL-2.0+
wdenk5f495752004-02-26 23:46:20 +000015 */
16/*
17 * IMPORTANT NOTES
18 * 1 - this driver is intended for use with USB Mass Storage Devices
19 * (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
20 */
21
22#include <common.h>
23
24#ifdef CONFIG_USB_OHCI
25
26#include <malloc.h>
27#include <usb.h>
28#include "usb_ohci.h"
29
30#include <mpc5xxx.h>
31
32#define OHCI_USE_NPS /* force NoPowerSwitching mode */
33#undef OHCI_VERBOSE_DEBUG /* not always helpful */
34#undef DEBUG
35#undef SHOW_INFO
36#undef OHCI_FILL_TRACE
37
38/* For initializing controller (mask in an HCFS mode too) */
39#define OHCI_CONTROL_INIT \
40 (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
41
Wolfgang Denk9af58052008-04-25 12:44:08 +020042#define readl(a) (*((volatile u32 *)(a)))
43#define writel(a, b) (*((volatile u32 *)(b)) = ((volatile u32)a))
wdenk5f495752004-02-26 23:46:20 +000044
wdenk5f495752004-02-26 23:46:20 +000045#ifdef DEBUG
46#define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
47#else
48#define dbg(format, arg...) do {} while(0)
49#endif /* DEBUG */
50#define err(format, arg...) printf("ERROR: " format "\n", ## arg)
51#ifdef SHOW_INFO
52#define info(format, arg...) printf("INFO: " format "\n", ## arg)
53#else
54#define info(format, arg...) do {} while(0)
55#endif
56
57#define m16_swap(x) swap_16(x)
58#define m32_swap(x) swap_32(x)
59
wdenk5f495752004-02-26 23:46:20 +000060#define ohci_cpu_to_le16(x) (x)
61#define ohci_cpu_to_le32(x) (x)
wdenk5f495752004-02-26 23:46:20 +000062
63/* global ohci_t */
64static ohci_t gohci;
65/* this must be aligned to a 256 byte boundary */
66struct ohci_hcca ghcca[1];
67/* a pointer to the aligned storage */
68struct ohci_hcca *phcca;
69/* this allocates EDs for all possible endpoints */
70struct ohci_device ohci_dev;
71/* urb_priv */
72urb_priv_t urb_priv;
73/* RHSC flag */
74int got_rhsc;
75/* device which was disconnected */
76struct usb_device *devgone;
Wolfgang Denkc7a4f7d2005-07-21 11:57:57 +020077/* flag guarding URB transation */
78int urb_finished = 0;
wdenk5f495752004-02-26 23:46:20 +000079
80/*-------------------------------------------------------------------------*/
81
82/* AMD-756 (D2 rev) reports corrupt register contents in some cases.
83 * The erratum (#4) description is incorrect. AMD's workaround waits
84 * till some bits (mostly reserved) are clear; ok for all revs.
85 */
86#define OHCI_QUIRK_AMD756 0xabcd
87#define read_roothub(hc, register, mask) ({ \
88 u32 temp = readl (&hc->regs->roothub.register); \
89 if (hc->flags & OHCI_QUIRK_AMD756) \
90 while (temp & mask) \
91 temp = readl (&hc->regs->roothub.register); \
92 temp; })
93
94static u32 roothub_a (struct ohci *hc)
95 { return read_roothub (hc, a, 0xfc0fe000); }
96static inline u32 roothub_b (struct ohci *hc)
97 { return readl (&hc->regs->roothub.b); }
98static inline u32 roothub_status (struct ohci *hc)
99 { return readl (&hc->regs->roothub.status); }
100static u32 roothub_portstatus (struct ohci *hc, int i)
101 { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
102
103
104/* forward declaration */
105static int hc_interrupt (void);
106static void
107td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
108 int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
109
110/*-------------------------------------------------------------------------*
111 * URB support functions
112 *-------------------------------------------------------------------------*/
113
114/* free HCD-private data associated with this URB */
115
116static void urb_free_priv (urb_priv_t * urb)
117{
118 int i;
119 int last;
120 struct td * td;
121
122 last = urb->length - 1;
123 if (last >= 0) {
124 for (i = 0; i <= last; i++) {
125 td = urb->td[i];
126 if (td) {
127 td->usb_dev = NULL;
128 urb->td[i] = NULL;
129 }
130 }
131 }
132}
133
134/*-------------------------------------------------------------------------*/
135
136#ifdef DEBUG
137static int sohci_get_current_frame_number (struct usb_device * dev);
138
139/* debug| print the main components of an URB
140 * small: 0) header + data packets 1) just header */
141
142static void pkt_print (struct usb_device * dev, unsigned long pipe, void * buffer,
143 int transfer_len, struct devrequest * setup, char * str, int small)
144{
145 urb_priv_t * purb = &urb_priv;
146
147 dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
148 str,
149 sohci_get_current_frame_number (dev),
150 usb_pipedevice (pipe),
151 usb_pipeendpoint (pipe),
152 usb_pipeout (pipe)? 'O': 'I',
153 usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
154 (usb_pipecontrol (pipe)? "CTRL": "BULK"),
155 purb->actual_length,
156 transfer_len, dev->status);
157#ifdef OHCI_VERBOSE_DEBUG
158 if (!small) {
159 int i, len;
160
161 if (usb_pipecontrol (pipe)) {
162 printf (__FILE__ ": cmd(8):");
163 for (i = 0; i < 8 ; i++)
164 printf (" %02x", ((__u8 *) setup) [i]);
165 printf ("\n");
166 }
167 if (transfer_len > 0 && buffer) {
168 printf (__FILE__ ": data(%d/%d):",
169 purb->actual_length,
170 transfer_len);
171 len = usb_pipeout (pipe)?
172 transfer_len: purb->actual_length;
173 for (i = 0; i < 16 && i < len; i++)
174 printf (" %02x", ((__u8 *) buffer) [i]);
175 printf ("%s\n", i < len? "...": "");
176 }
177 }
178#endif
179}
180
181/* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
182void ep_print_int_eds (ohci_t *ohci, char * str) {
183 int i, j;
184 __u32 * ed_p;
185 for (i= 0; i < 32; i++) {
186 j = 5;
187 ed_p = &(ohci->hcca->int_table [i]);
188 if (*ed_p == 0)
189 continue;
190 printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
191 while (*ed_p != 0 && j--) {
192 ed_t *ed = (ed_t *)ohci_cpu_to_le32(ed_p);
193 printf (" ed: %4x;", ed->hwINFO);
194 ed_p = &ed->hwNextED;
195 }
196 printf ("\n");
197 }
198}
199
200static void ohci_dump_intr_mask (char *label, __u32 mask)
201{
202 dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
203 label,
204 mask,
205 (mask & OHCI_INTR_MIE) ? " MIE" : "",
206 (mask & OHCI_INTR_OC) ? " OC" : "",
207 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
208 (mask & OHCI_INTR_FNO) ? " FNO" : "",
209 (mask & OHCI_INTR_UE) ? " UE" : "",
210 (mask & OHCI_INTR_RD) ? " RD" : "",
211 (mask & OHCI_INTR_SF) ? " SF" : "",
212 (mask & OHCI_INTR_WDH) ? " WDH" : "",
213 (mask & OHCI_INTR_SO) ? " SO" : ""
214 );
215}
216
217static void maybe_print_eds (char *label, __u32 value)
218{
219 ed_t *edp = (ed_t *)value;
220
221 if (value) {
222 dbg ("%s %08x", label, value);
223 dbg ("%08x", edp->hwINFO);
224 dbg ("%08x", edp->hwTailP);
225 dbg ("%08x", edp->hwHeadP);
226 dbg ("%08x", edp->hwNextED);
227 }
228}
229
230static char * hcfs2string (int state)
231{
232 switch (state) {
233 case OHCI_USB_RESET: return "reset";
234 case OHCI_USB_RESUME: return "resume";
235 case OHCI_USB_OPER: return "operational";
236 case OHCI_USB_SUSPEND: return "suspend";
237 }
238 return "?";
239}
240
241/* dump control and status registers */
242static void ohci_dump_status (ohci_t *controller)
243{
244 struct ohci_regs *regs = controller->regs;
245 __u32 temp;
246
247 temp = readl (&regs->revision) & 0xff;
248 if (temp != 0x10)
249 dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
250
251 temp = readl (&regs->control);
252 dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
253 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
254 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
255 (temp & OHCI_CTRL_IR) ? " IR" : "",
256 hcfs2string (temp & OHCI_CTRL_HCFS),
257 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
258 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
259 (temp & OHCI_CTRL_IE) ? " IE" : "",
260 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
261 temp & OHCI_CTRL_CBSR
262 );
263
264 temp = readl (&regs->cmdstatus);
265 dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
266 (temp & OHCI_SOC) >> 16,
267 (temp & OHCI_OCR) ? " OCR" : "",
268 (temp & OHCI_BLF) ? " BLF" : "",
269 (temp & OHCI_CLF) ? " CLF" : "",
270 (temp & OHCI_HCR) ? " HCR" : ""
271 );
272
273 ohci_dump_intr_mask ("intrstatus", readl (&regs->intrstatus));
274 ohci_dump_intr_mask ("intrenable", readl (&regs->intrenable));
275
276 maybe_print_eds ("ed_periodcurrent", readl (&regs->ed_periodcurrent));
277
278 maybe_print_eds ("ed_controlhead", readl (&regs->ed_controlhead));
279 maybe_print_eds ("ed_controlcurrent", readl (&regs->ed_controlcurrent));
280
281 maybe_print_eds ("ed_bulkhead", readl (&regs->ed_bulkhead));
282 maybe_print_eds ("ed_bulkcurrent", readl (&regs->ed_bulkcurrent));
283
284 maybe_print_eds ("donehead", readl (&regs->donehead));
285}
286
287static void ohci_dump_roothub (ohci_t *controller, int verbose)
288{
289 __u32 temp, ndp, i;
290
291 temp = roothub_a (controller);
292 ndp = (temp & RH_A_NDP);
293
294 if (verbose) {
295 dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
296 ((temp & RH_A_POTPGT) >> 24) & 0xff,
297 (temp & RH_A_NOCP) ? " NOCP" : "",
298 (temp & RH_A_OCPM) ? " OCPM" : "",
299 (temp & RH_A_DT) ? " DT" : "",
300 (temp & RH_A_NPS) ? " NPS" : "",
301 (temp & RH_A_PSM) ? " PSM" : "",
302 ndp
303 );
304 temp = roothub_b (controller);
305 dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
306 temp,
307 (temp & RH_B_PPCM) >> 16,
308 (temp & RH_B_DR)
309 );
310 temp = roothub_status (controller);
311 dbg ("roothub.status: %08x%s%s%s%s%s%s",
312 temp,
313 (temp & RH_HS_CRWE) ? " CRWE" : "",
314 (temp & RH_HS_OCIC) ? " OCIC" : "",
315 (temp & RH_HS_LPSC) ? " LPSC" : "",
316 (temp & RH_HS_DRWE) ? " DRWE" : "",
317 (temp & RH_HS_OCI) ? " OCI" : "",
318 (temp & RH_HS_LPS) ? " LPS" : ""
319 );
320 }
321
322 for (i = 0; i < ndp; i++) {
323 temp = roothub_portstatus (controller, i);
324 dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
325 i,
326 temp,
327 (temp & RH_PS_PRSC) ? " PRSC" : "",
328 (temp & RH_PS_OCIC) ? " OCIC" : "",
329 (temp & RH_PS_PSSC) ? " PSSC" : "",
330 (temp & RH_PS_PESC) ? " PESC" : "",
331 (temp & RH_PS_CSC) ? " CSC" : "",
332
333 (temp & RH_PS_LSDA) ? " LSDA" : "",
334 (temp & RH_PS_PPS) ? " PPS" : "",
335 (temp & RH_PS_PRS) ? " PRS" : "",
336 (temp & RH_PS_POCI) ? " POCI" : "",
337 (temp & RH_PS_PSS) ? " PSS" : "",
338
339 (temp & RH_PS_PES) ? " PES" : "",
340 (temp & RH_PS_CCS) ? " CCS" : ""
341 );
342 }
343}
344
345static void ohci_dump (ohci_t *controller, int verbose)
346{
347 dbg ("OHCI controller usb-%s state", controller->slot_name);
348
349 /* dumps some of the state we know about */
350 ohci_dump_status (controller);
351 if (verbose)
352 ep_print_int_eds (controller, "hcca");
353 dbg ("hcca frame #%04x", controller->hcca->frame_no);
354 ohci_dump_roothub (controller, 1);
355}
356
357
358#endif /* DEBUG */
359
360/*-------------------------------------------------------------------------*
361 * Interface functions (URB)
362 *-------------------------------------------------------------------------*/
363
364/* get a transfer request */
365
366int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
367 int transfer_len, struct devrequest *setup, int interval)
368{
369 ohci_t *ohci;
370 ed_t * ed;
371 urb_priv_t *purb_priv;
372 int i, size = 0;
373
374 ohci = &gohci;
375
376 /* when controller's hung, permit only roothub cleanup attempts
377 * such as powering down ports */
378 if (ohci->disabled) {
379 err("sohci_submit_job: EPIPE");
380 return -1;
381 }
382
Wolfgang Denkc7a4f7d2005-07-21 11:57:57 +0200383 /* if we have an unfinished URB from previous transaction let's
384 * fail and scream as quickly as possible so as not to corrupt
385 * further communication */
386 if (!urb_finished) {
387 err("sohci_submit_job: URB NOT FINISHED");
388 return -1;
389 }
390 /* we're about to begin a new transaction here so mark the URB unfinished */
391 urb_finished = 0;
392
wdenk5f495752004-02-26 23:46:20 +0000393 /* every endpoint has a ed, locate and fill it */
394 if (!(ed = ep_add_ed (dev, pipe))) {
395 err("sohci_submit_job: ENOMEM");
396 return -1;
397 }
398
399 /* for the private part of the URB we need the number of TDs (size) */
400 switch (usb_pipetype (pipe)) {
401 case PIPE_BULK: /* one TD for every 4096 Byte */
402 size = (transfer_len - 1) / 4096 + 1;
403 break;
404 case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
405 size = (transfer_len == 0)? 2:
406 (transfer_len - 1) / 4096 + 3;
407 break;
408 }
409
410 if (size >= (N_URB_TD - 1)) {
411 err("need %d TDs, only have %d", size, N_URB_TD);
412 return -1;
413 }
414 purb_priv = &urb_priv;
415 purb_priv->pipe = pipe;
416
417 /* fill the private part of the URB */
418 purb_priv->length = size;
419 purb_priv->ed = ed;
420 purb_priv->actual_length = 0;
421
422 /* allocate the TDs */
423 /* note that td[0] was allocated in ep_add_ed */
424 for (i = 0; i < size; i++) {
425 purb_priv->td[i] = td_alloc (dev);
426 if (!purb_priv->td[i]) {
427 purb_priv->length = i;
428 urb_free_priv (purb_priv);
429 err("sohci_submit_job: ENOMEM");
430 return -1;
431 }
432 }
433
434 if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
435 urb_free_priv (purb_priv);
436 err("sohci_submit_job: EINVAL");
437 return -1;
438 }
439
440 /* link the ed into a chain if is not already */
441 if (ed->state != ED_OPER)
442 ep_link (ohci, ed);
443
444 /* fill the TDs and link it to the ed */
445 td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
446
447 return 0;
448}
449
450/*-------------------------------------------------------------------------*/
451
452#ifdef DEBUG
453/* tell us the current USB frame number */
454
455static int sohci_get_current_frame_number (struct usb_device *usb_dev)
456{
457 ohci_t *ohci = &gohci;
458
459 return ohci_cpu_to_le16 (ohci->hcca->frame_no);
460}
461#endif
462
463/*-------------------------------------------------------------------------*
464 * ED handling functions
465 *-------------------------------------------------------------------------*/
466
467/* link an ed into one of the HC chains */
468
469static int ep_link (ohci_t *ohci, ed_t *edi)
470{
471 volatile ed_t *ed = edi;
472
473 ed->state = ED_OPER;
474
475 switch (ed->type) {
476 case PIPE_CONTROL:
477 ed->hwNextED = 0;
478 if (ohci->ed_controltail == NULL) {
479 writel (ed, &ohci->regs->ed_controlhead);
480 } else {
wdenk0a12b752004-03-11 22:46:36 +0000481 ohci->ed_controltail->hwNextED = ohci_cpu_to_le32 ((unsigned long)ed);
wdenk5f495752004-02-26 23:46:20 +0000482 }
483 ed->ed_prev = ohci->ed_controltail;
484 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
485 !ohci->ed_rm_list[1] && !ohci->sleeping) {
486 ohci->hc_control |= OHCI_CTRL_CLE;
487 writel (ohci->hc_control, &ohci->regs->control);
488 }
489 ohci->ed_controltail = edi;
490 break;
491
492 case PIPE_BULK:
493 ed->hwNextED = 0;
494 if (ohci->ed_bulktail == NULL) {
495 writel (ed, &ohci->regs->ed_bulkhead);
496 } else {
wdenk0a12b752004-03-11 22:46:36 +0000497 ohci->ed_bulktail->hwNextED = ohci_cpu_to_le32 ((unsigned long)ed);
wdenk5f495752004-02-26 23:46:20 +0000498 }
499 ed->ed_prev = ohci->ed_bulktail;
500 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
501 !ohci->ed_rm_list[1] && !ohci->sleeping) {
502 ohci->hc_control |= OHCI_CTRL_BLE;
503 writel (ohci->hc_control, &ohci->regs->control);
504 }
505 ohci->ed_bulktail = edi;
506 break;
507 }
508 return 0;
509}
510
511/*-------------------------------------------------------------------------*/
512
513/* unlink an ed from one of the HC chains.
514 * just the link to the ed is unlinked.
515 * the link from the ed still points to another operational ed or 0
516 * so the HC can eventually finish the processing of the unlinked ed */
517
518static int ep_unlink (ohci_t *ohci, ed_t *edi)
519{
520 volatile ed_t *ed = edi;
521
522 ed->hwINFO |= ohci_cpu_to_le32 (OHCI_ED_SKIP);
523
524 switch (ed->type) {
525 case PIPE_CONTROL:
526 if (ed->ed_prev == NULL) {
527 if (!ed->hwNextED) {
528 ohci->hc_control &= ~OHCI_CTRL_CLE;
529 writel (ohci->hc_control, &ohci->regs->control);
530 }
531 writel (ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
532 } else {
533 ed->ed_prev->hwNextED = ed->hwNextED;
534 }
535 if (ohci->ed_controltail == ed) {
536 ohci->ed_controltail = ed->ed_prev;
537 } else {
538 ((ed_t *)ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
539 }
540 break;
541
542 case PIPE_BULK:
543 if (ed->ed_prev == NULL) {
544 if (!ed->hwNextED) {
545 ohci->hc_control &= ~OHCI_CTRL_BLE;
546 writel (ohci->hc_control, &ohci->regs->control);
547 }
548 writel (ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
549 } else {
550 ed->ed_prev->hwNextED = ed->hwNextED;
551 }
552 if (ohci->ed_bulktail == ed) {
553 ohci->ed_bulktail = ed->ed_prev;
554 } else {
555 ((ed_t *)ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
556 }
557 break;
558 }
559 ed->state = ED_UNLINK;
560 return 0;
561}
562
563
564/*-------------------------------------------------------------------------*/
565
566/* add/reinit an endpoint; this should be done once at the usb_set_configuration command,
567 * but the USB stack is a little bit stateless so we do it at every transaction
568 * if the state of the ed is ED_NEW then a dummy td is added and the state is changed to ED_UNLINK
569 * in all other cases the state is left unchanged
570 * the ed info fields are setted anyway even though most of them should not change */
571
572static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)
573{
574 td_t *td;
575 ed_t *ed_ret;
576 volatile ed_t *ed;
577
578 ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
579 (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
580
581 if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
582 err("ep_add_ed: pending delete");
583 /* pending delete request */
584 return NULL;
585 }
586
587 if (ed->state == ED_NEW) {
588 ed->hwINFO = ohci_cpu_to_le32 (OHCI_ED_SKIP); /* skip ed */
589 /* dummy td; end of td list for ed */
590 td = td_alloc (usb_dev);
wdenk0a12b752004-03-11 22:46:36 +0000591 ed->hwTailP = ohci_cpu_to_le32 ((unsigned long)td);
wdenk5f495752004-02-26 23:46:20 +0000592 ed->hwHeadP = ed->hwTailP;
593 ed->state = ED_UNLINK;
594 ed->type = usb_pipetype (pipe);
595 ohci_dev.ed_cnt++;
596 }
597
598 ed->hwINFO = ohci_cpu_to_le32 (usb_pipedevice (pipe)
599 | usb_pipeendpoint (pipe) << 7
600 | (usb_pipeisoc (pipe)? 0x8000: 0)
601 | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
Ilya Yanoka1cf10f2012-11-06 13:48:20 +0000602 | (usb_dev->speed == USB_SPEED_LOW) << 13
wdenk5f495752004-02-26 23:46:20 +0000603 | usb_maxpacket (usb_dev, pipe) << 16);
604
605 return ed_ret;
606}
607
608/*-------------------------------------------------------------------------*
609 * TD handling functions
610 *-------------------------------------------------------------------------*/
611
612/* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
613
614static void td_fill (ohci_t *ohci, unsigned int info,
615 void *data, int len,
616 struct usb_device *dev, int index, urb_priv_t *urb_priv)
617{
618 volatile td_t *td, *td_pt;
619#ifdef OHCI_FILL_TRACE
620 int i;
621#endif
622
623 if (index > urb_priv->length) {
624 err("index > length");
625 return;
626 }
627 /* use this td as the next dummy */
628 td_pt = urb_priv->td [index];
629 td_pt->hwNextTD = 0;
630
631 /* fill the old dummy TD */
632 td = urb_priv->td [index] = (td_t *)(ohci_cpu_to_le32 (urb_priv->ed->hwTailP) & ~0xf);
633
634 td->ed = urb_priv->ed;
635 td->next_dl_td = NULL;
636 td->index = index;
637 td->data = (__u32)data;
638#ifdef OHCI_FILL_TRACE
Remy Bohmerd8c55ab2008-10-10 10:23:22 +0200639 if (usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe)) {
wdenk5f495752004-02-26 23:46:20 +0000640 for (i = 0; i < len; i++)
641 printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
642 printf("\n");
643 }
644#endif
645 if (!len)
646 data = 0;
647
648 td->hwINFO = ohci_cpu_to_le32 (info);
wdenk0a12b752004-03-11 22:46:36 +0000649 td->hwCBP = ohci_cpu_to_le32 ((unsigned long)data);
wdenk5f495752004-02-26 23:46:20 +0000650 if (data)
wdenk0a12b752004-03-11 22:46:36 +0000651 td->hwBE = ohci_cpu_to_le32 ((unsigned long)(data + len - 1));
wdenk5f495752004-02-26 23:46:20 +0000652 else
653 td->hwBE = 0;
wdenk0a12b752004-03-11 22:46:36 +0000654 td->hwNextTD = ohci_cpu_to_le32 ((unsigned long)td_pt);
wdenk5f495752004-02-26 23:46:20 +0000655
656 /* append to queue */
657 td->ed->hwTailP = td->hwNextTD;
658}
659
660/*-------------------------------------------------------------------------*/
661
662/* prepare all TDs of a transfer */
wdenk5f495752004-02-26 23:46:20 +0000663static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
664 int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
665{
666 ohci_t *ohci = &gohci;
667 int data_len = transfer_len;
668 void *data;
669 int cnt = 0;
670 __u32 info = 0;
671 unsigned int toggle = 0;
672
673 /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
674 if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
675 toggle = TD_T_TOGGLE;
676 } else {
677 toggle = TD_T_DATA0;
678 usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
679 }
680 urb->td_cnt = 0;
681 if (data_len)
682 data = buffer;
683 else
684 data = 0;
685
686 switch (usb_pipetype (pipe)) {
687 case PIPE_BULK:
688 info = usb_pipeout (pipe)?
689 TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
690 while(data_len > 4096) {
691 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
692 data += 4096; data_len -= 4096; cnt++;
693 }
694 info = usb_pipeout (pipe)?
695 TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
696 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
697 cnt++;
698
699 if (!ohci->sleeping)
700 writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
701 break;
702
703 case PIPE_CONTROL:
704 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
705 td_fill (ohci, info, setup, 8, dev, cnt++, urb);
706 if (data_len > 0) {
707 info = usb_pipeout (pipe)?
708 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
709 /* NOTE: mishandles transfers >8K, some >4K */
710 td_fill (ohci, info, data, data_len, dev, cnt++, urb);
711 }
712 info = usb_pipeout (pipe)?
713 TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
714 td_fill (ohci, info, data, 0, dev, cnt++, urb);
715 if (!ohci->sleeping)
716 writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
717 break;
718 }
719 if (urb->length != cnt)
720 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
721}
722
723/*-------------------------------------------------------------------------*
724 * Done List handling functions
725 *-------------------------------------------------------------------------*/
726
727
728/* calculate the transfer length and update the urb */
729
730static void dl_transfer_length(td_t * td)
731{
Wolfgang Denk64070ba2011-11-04 15:55:10 +0000732 __u32 tdBE, tdCBP;
wdenk5f495752004-02-26 23:46:20 +0000733 urb_priv_t *lurb_priv = &urb_priv;
734
wdenk5f495752004-02-26 23:46:20 +0000735 tdBE = ohci_cpu_to_le32 (td->hwBE);
736 tdCBP = ohci_cpu_to_le32 (td->hwCBP);
737
738
Remy Bohmerd8c55ab2008-10-10 10:23:22 +0200739 if (!(usb_pipecontrol(lurb_priv->pipe) &&
wdenk5f495752004-02-26 23:46:20 +0000740 ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
741 if (tdBE != 0) {
742 if (td->hwCBP == 0)
743 lurb_priv->actual_length += tdBE - td->data + 1;
744 else
745 lurb_priv->actual_length += tdCBP - td->data;
746 }
747 }
748}
749
750/*-------------------------------------------------------------------------*/
751
752/* replies to the request have to be on a FIFO basis so
753 * we reverse the reversed done-list */
754
755static td_t * dl_reverse_done_list (ohci_t *ohci)
756{
757 __u32 td_list_hc;
758 td_t *td_rev = NULL;
759 td_t *td_list = NULL;
760 urb_priv_t *lurb_priv = NULL;
761
762 td_list_hc = ohci_cpu_to_le32 (ohci->hcca->done_head) & 0xfffffff0;
763 ohci->hcca->done_head = 0;
764
765 while (td_list_hc) {
766 td_list = (td_t *)td_list_hc;
767
768 if (TD_CC_GET (ohci_cpu_to_le32 (td_list->hwINFO))) {
769 lurb_priv = &urb_priv;
770 dbg(" USB-error/status: %x : %p",
771 TD_CC_GET (ohci_cpu_to_le32 (td_list->hwINFO)), td_list);
772 if (td_list->ed->hwHeadP & ohci_cpu_to_le32 (0x1)) {
773 if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
774 td_list->ed->hwHeadP =
775 (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & ohci_cpu_to_le32 (0xfffffff0)) |
776 (td_list->ed->hwHeadP & ohci_cpu_to_le32 (0x2));
777 lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
778 } else
779 td_list->ed->hwHeadP &= ohci_cpu_to_le32 (0xfffffff2);
780 }
wdenk5f495752004-02-26 23:46:20 +0000781 td_list->hwNextTD = 0;
wdenk5f495752004-02-26 23:46:20 +0000782 }
783
784 td_list->next_dl_td = td_rev;
785 td_rev = td_list;
786 td_list_hc = ohci_cpu_to_le32 (td_list->hwNextTD) & 0xfffffff0;
787 }
788 return td_list;
789}
790
791/*-------------------------------------------------------------------------*/
792
793/* td done list */
794static int dl_done_list (ohci_t *ohci, td_t *td_list)
795{
796 td_t *td_list_next = NULL;
797 ed_t *ed;
798 int cc = 0;
Wolfgang Denkc7a4f7d2005-07-21 11:57:57 +0200799 int stat = 0;
wdenk5f495752004-02-26 23:46:20 +0000800 /* urb_t *urb; */
801 urb_priv_t *lurb_priv;
802 __u32 tdINFO, edHeadP, edTailP;
803
804 while (td_list) {
805 td_list_next = td_list->next_dl_td;
806
807 lurb_priv = &urb_priv;
808 tdINFO = ohci_cpu_to_le32 (td_list->hwINFO);
809
810 ed = td_list->ed;
811
812 dl_transfer_length(td_list);
813
814 /* error code of transfer */
815 cc = TD_CC_GET (tdINFO);
816 if (++(lurb_priv->td_cnt) == lurb_priv->length) {
817 if ((ed->state & (ED_OPER | ED_UNLINK))
818 && (lurb_priv->state != URB_DEL)) {
819 dbg("ConditionCode %#x", cc);
820 stat = cc_to_error[cc];
Wolfgang Denkc7a4f7d2005-07-21 11:57:57 +0200821 urb_finished = 1;
wdenk5f495752004-02-26 23:46:20 +0000822 }
823 }
824
825 if (ed->state != ED_NEW) {
826 edHeadP = ohci_cpu_to_le32 (ed->hwHeadP) & 0xfffffff0;
827 edTailP = ohci_cpu_to_le32 (ed->hwTailP);
828
829 /* unlink eds if they are not busy */
830 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
831 ep_unlink (ohci, ed);
832 }
833
834 td_list = td_list_next;
835 }
836 return stat;
837}
838
839/*-------------------------------------------------------------------------*
840 * Virtual Root Hub
841 *-------------------------------------------------------------------------*/
842
Stephen Warren39c89682014-02-13 21:15:18 -0700843#include <usbroothubdes.h>
wdenk5f495752004-02-26 23:46:20 +0000844
845/* Hub class-specific descriptor is constructed dynamically */
846
847
848/*-------------------------------------------------------------------------*/
849
850#define OK(x) len = (x); break
851#ifdef DEBUG
852#define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
853#define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
854#else
855#define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
856#define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
857#endif
858#define RD_RH_STAT roothub_status(&gohci)
859#define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1)
860
861/* request to virtual root hub */
862
863int rh_check_port_status(ohci_t *controller)
864{
865 __u32 temp, ndp, i;
866 int res;
867
868 res = -1;
869 temp = roothub_a (controller);
870 ndp = (temp & RH_A_NDP);
871 for (i = 0; i < ndp; i++) {
872 temp = roothub_portstatus (controller, i);
873 /* check for a device disconnect */
874 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
875 (RH_PS_PESC | RH_PS_CSC)) &&
876 ((temp & RH_PS_CCS) == 0)) {
877 res = i;
878 break;
879 }
880 }
881 return res;
882}
883
884static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
885 void *buffer, int transfer_len, struct devrequest *cmd)
886{
887 void * data = buffer;
888 int leni = transfer_len;
889 int len = 0;
890 int stat = 0;
891 __u32 datab[4];
892 __u8 *data_buf = (__u8 *)datab;
893 __u16 bmRType_bReq;
894 __u16 wValue;
895 __u16 wIndex;
896 __u16 wLength;
897
898#ifdef DEBUG
899urb_priv.actual_length = 0;
900pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
901#endif
Remy Bohmerd8c55ab2008-10-10 10:23:22 +0200902 if (usb_pipeint(pipe)) {
wdenk5f495752004-02-26 23:46:20 +0000903 info("Root-Hub submit IRQ: NOT implemented");
904 return 0;
905 }
906
907 bmRType_bReq = cmd->requesttype | (cmd->request << 8);
908 wValue = m16_swap (cmd->value);
909 wIndex = m16_swap (cmd->index);
910 wLength = m16_swap (cmd->length);
911
912 info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
913 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
914
915 switch (bmRType_bReq) {
916 /* Request Destination:
917 without flags: Device,
918 RH_INTERFACE: interface,
919 RH_ENDPOINT: endpoint,
920 RH_CLASS means HUB here,
921 RH_OTHER | RH_CLASS almost ever means HUB_PORT here
922 */
923
924 case RH_GET_STATUS:
925 *(__u16 *) data_buf = m16_swap (1); OK (2);
926 case RH_GET_STATUS | RH_INTERFACE:
927 *(__u16 *) data_buf = m16_swap (0); OK (2);
928 case RH_GET_STATUS | RH_ENDPOINT:
929 *(__u16 *) data_buf = m16_swap (0); OK (2);
930 case RH_GET_STATUS | RH_CLASS:
931 *(__u32 *) data_buf = m32_swap (
932 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
933 OK (4);
934 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
935 *(__u32 *) data_buf = m32_swap (RD_RH_PORTSTAT); OK (4);
936
937 case RH_CLEAR_FEATURE | RH_ENDPOINT:
938 switch (wValue) {
939 case (RH_ENDPOINT_STALL): OK (0);
940 }
941 break;
942
943 case RH_CLEAR_FEATURE | RH_CLASS:
944 switch (wValue) {
945 case RH_C_HUB_LOCAL_POWER:
946 OK(0);
947 case (RH_C_HUB_OVER_CURRENT):
948 WR_RH_STAT(RH_HS_OCIC); OK (0);
949 }
950 break;
951
952 case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
953 switch (wValue) {
954 case (RH_PORT_ENABLE):
955 WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
956 case (RH_PORT_SUSPEND):
957 WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
958 case (RH_PORT_POWER):
959 WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
960 case (RH_C_PORT_CONNECTION):
961 WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
962 case (RH_C_PORT_ENABLE):
963 WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
964 case (RH_C_PORT_SUSPEND):
965 WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
966 case (RH_C_PORT_OVER_CURRENT):
967 WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
968 case (RH_C_PORT_RESET):
969 WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
970 }
971 break;
972
973 case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
974 switch (wValue) {
975 case (RH_PORT_SUSPEND):
976 WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
977 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
978 if (RD_RH_PORTSTAT & RH_PS_CCS)
979 WR_RH_PORTSTAT (RH_PS_PRS);
980 OK (0);
981 case (RH_PORT_POWER):
982 WR_RH_PORTSTAT (RH_PS_PPS ); OK (0);
983 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
984 if (RD_RH_PORTSTAT & RH_PS_CCS)
985 WR_RH_PORTSTAT (RH_PS_PES );
986 OK (0);
987 }
988 break;
989
990 case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
991
992 case RH_GET_DESCRIPTOR:
993 switch ((wValue & 0xff00) >> 8) {
994 case (0x01): /* device descriptor */
995 len = min_t(unsigned int,
996 leni,
997 min_t(unsigned int,
998 sizeof (root_hub_dev_des),
999 wLength));
1000 data_buf = root_hub_dev_des; OK(len);
1001 case (0x02): /* configuration descriptor */
1002 len = min_t(unsigned int,
1003 leni,
1004 min_t(unsigned int,
1005 sizeof (root_hub_config_des),
1006 wLength));
1007 data_buf = root_hub_config_des; OK(len);
1008 case (0x03): /* string descriptors */
1009 if(wValue==0x0300) {
1010 len = min_t(unsigned int,
1011 leni,
1012 min_t(unsigned int,
1013 sizeof (root_hub_str_index0),
1014 wLength));
1015 data_buf = root_hub_str_index0;
1016 OK(len);
1017 }
1018 if(wValue==0x0301) {
1019 len = min_t(unsigned int,
1020 leni,
1021 min_t(unsigned int,
1022 sizeof (root_hub_str_index1),
1023 wLength));
1024 data_buf = root_hub_str_index1;
1025 OK(len);
1026 }
1027 default:
1028 stat = USB_ST_STALLED;
1029 }
1030 break;
1031
1032 case RH_GET_DESCRIPTOR | RH_CLASS:
1033 {
1034 __u32 temp = roothub_a (&gohci);
1035
1036 data_buf [0] = 9; /* min length; */
1037 data_buf [1] = 0x29;
1038 data_buf [2] = temp & RH_A_NDP;
1039 data_buf [3] = 0;
1040 if (temp & RH_A_PSM) /* per-port power switching? */
1041 data_buf [3] |= 0x1;
1042 if (temp & RH_A_NOCP) /* no overcurrent reporting? */
1043 data_buf [3] |= 0x10;
1044 else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */
1045 data_buf [3] |= 0x8;
1046
1047 /* corresponds to data_buf[4-7] */
1048 datab [1] = 0;
1049 data_buf [5] = (temp & RH_A_POTPGT) >> 24;
1050 temp = roothub_b (&gohci);
1051 data_buf [7] = temp & RH_B_DR;
1052 if (data_buf [2] < 7) {
1053 data_buf [8] = 0xff;
1054 } else {
1055 data_buf [0] += 2;
1056 data_buf [8] = (temp & RH_B_DR) >> 8;
1057 data_buf [10] = data_buf [9] = 0xff;
1058 }
1059
1060 len = min_t(unsigned int, leni,
1061 min_t(unsigned int, data_buf [0], wLength));
1062 OK (len);
1063 }
1064
1065 case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK (1);
1066
1067 case RH_SET_CONFIGURATION: WR_RH_STAT (0x10000); OK (0);
1068
1069 default:
1070 dbg ("unsupported root hub command");
1071 stat = USB_ST_STALLED;
1072 }
1073
1074#ifdef DEBUG
1075 ohci_dump_roothub (&gohci, 1);
1076#endif
1077
1078 len = min_t(int, len, leni);
1079 if (data != data_buf)
1080 memcpy (data, data_buf, len);
1081 dev->act_len = len;
1082 dev->status = stat;
1083
1084#ifdef DEBUG
1085 if (transfer_len)
1086 urb_priv.actual_length = transfer_len;
1087 pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1088#endif
1089
1090 return stat;
1091}
1092
1093/*-------------------------------------------------------------------------*/
1094
1095/* common code for handling submit messages - used for all but root hub */
1096/* accesses. */
1097int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1098 int transfer_len, struct devrequest *setup, int interval)
1099{
1100 int stat = 0;
1101 int maxsize = usb_maxpacket(dev, pipe);
1102 int timeout;
1103
1104 /* device pulled? Shortcut the action. */
1105 if (devgone == dev) {
1106 dev->status = USB_ST_CRC_ERR;
1107 return 0;
1108 }
1109
1110#ifdef DEBUG
1111 urb_priv.actual_length = 0;
1112 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1113#endif
1114 if (!maxsize) {
1115 err("submit_common_message: pipesize for pipe %lx is zero",
1116 pipe);
1117 return -1;
1118 }
1119
1120 if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) < 0) {
1121 err("sohci_submit_job failed");
1122 return -1;
1123 }
1124
1125 /* allow more time for a BULK device to react - some are slow */
1126#define BULK_TO 5000 /* timeout in milliseconds */
Remy Bohmerd8c55ab2008-10-10 10:23:22 +02001127 if (usb_pipebulk(pipe))
wdenk5f495752004-02-26 23:46:20 +00001128 timeout = BULK_TO;
1129 else
1130 timeout = 100;
1131
1132 /* wait for it to complete */
1133 for (;;) {
1134 /* check whether the controller is done */
1135 stat = hc_interrupt();
1136 if (stat < 0) {
1137 stat = USB_ST_CRC_ERR;
1138 break;
1139 }
Wolfgang Denkd06ce5d2005-08-02 17:06:17 +02001140
Wolfgang Denkc7a4f7d2005-07-21 11:57:57 +02001141 /* NOTE: since we are not interrupt driven in U-Boot and always
1142 * handle only one URB at a time, we cannot assume the
1143 * transaction finished on the first successful return from
1144 * hc_interrupt().. unless the flag for current URB is set,
1145 * meaning that all TD's to/from device got actually
1146 * transferred and processed. If the current URB is not
1147 * finished we need to re-iterate this loop so as
1148 * hc_interrupt() gets called again as there needs to be some
1149 * more TD's to process still */
1150 if ((stat >= 0) && (stat != 0xff) && (urb_finished)) {
wdenk5f495752004-02-26 23:46:20 +00001151 /* 0xff is returned for an SF-interrupt */
1152 break;
1153 }
Wolfgang Denkc7a4f7d2005-07-21 11:57:57 +02001154
wdenk5f495752004-02-26 23:46:20 +00001155 if (--timeout) {
Mike Frysinger60ce19a2012-03-05 13:47:00 +00001156 mdelay(1);
Wolfgang Denkc7a4f7d2005-07-21 11:57:57 +02001157 if (!urb_finished)
1158 dbg("\%");
1159
wdenk5f495752004-02-26 23:46:20 +00001160 } else {
1161 err("CTL:TIMEOUT ");
Wolfgang Denkc7a4f7d2005-07-21 11:57:57 +02001162 dbg("submit_common_msg: TO status %x\n", stat);
wdenk5f495752004-02-26 23:46:20 +00001163 stat = USB_ST_CRC_ERR;
Wolfgang Denkc7a4f7d2005-07-21 11:57:57 +02001164 urb_finished = 1;
wdenk5f495752004-02-26 23:46:20 +00001165 break;
1166 }
1167 }
Wolfgang Denkc7a4f7d2005-07-21 11:57:57 +02001168#if 0
wdenk5f495752004-02-26 23:46:20 +00001169 /* we got an Root Hub Status Change interrupt */
1170 if (got_rhsc) {
1171#ifdef DEBUG
1172 ohci_dump_roothub (&gohci, 1);
1173#endif
1174 got_rhsc = 0;
1175 /* abuse timeout */
1176 timeout = rh_check_port_status(&gohci);
1177 if (timeout >= 0) {
1178#if 0 /* this does nothing useful, but leave it here in case that changes */
1179 /* the called routine adds 1 to the passed value */
1180 usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
1181#endif
1182 /*
1183 * XXX
1184 * This is potentially dangerous because it assumes
1185 * that only one device is ever plugged in!
1186 */
1187 devgone = dev;
1188 }
1189 }
Wolfgang Denkc7a4f7d2005-07-21 11:57:57 +02001190#endif
wdenk5f495752004-02-26 23:46:20 +00001191
1192 dev->status = stat;
1193 dev->act_len = transfer_len;
1194
1195#ifdef DEBUG
1196 pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
1197#endif
1198
1199 /* free TDs in urb_priv */
1200 urb_free_priv (&urb_priv);
1201 return 0;
1202}
1203
1204/* submit routines called from usb.c */
1205int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1206 int transfer_len)
1207{
1208 info("submit_bulk_msg");
1209 return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1210}
1211
1212int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1213 int transfer_len, struct devrequest *setup)
1214{
1215 int maxsize = usb_maxpacket(dev, pipe);
1216
1217 info("submit_control_msg");
1218#ifdef DEBUG
1219 urb_priv.actual_length = 0;
1220 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1221#endif
1222 if (!maxsize) {
1223 err("submit_control_message: pipesize for pipe %lx is zero",
1224 pipe);
1225 return -1;
1226 }
1227 if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1228 gohci.rh.dev = dev;
1229 /* root hub - redirect */
1230 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1231 setup);
1232 }
1233
1234 return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1235}
1236
1237int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1238 int transfer_len, int interval)
1239{
1240 info("submit_int_msg");
1241 return -1;
1242}
1243
1244/*-------------------------------------------------------------------------*
1245 * HC functions
1246 *-------------------------------------------------------------------------*/
1247
1248/* reset the HC and BUS */
1249
1250static int hc_reset (ohci_t *ohci)
1251{
1252 int timeout = 30;
1253 int smm_timeout = 50; /* 0,5 sec */
1254
1255 if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
1256 writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
1257 info("USB HC TakeOver from SMM");
1258 while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
Mike Frysinger60ce19a2012-03-05 13:47:00 +00001259 mdelay (10);
wdenk5f495752004-02-26 23:46:20 +00001260 if (--smm_timeout == 0) {
1261 err("USB HC TakeOver failed!");
1262 return -1;
1263 }
1264 }
1265 }
1266
1267 /* Disable HC interrupts */
1268 writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
1269
1270 dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;",
1271 ohci->slot_name,
1272 readl (&ohci->regs->control));
1273
1274 /* Reset USB (needed by some controllers) */
1275 ohci->hc_control = 0;
1276 writel (ohci->hc_control, &ohci->regs->control);
1277
1278 /* HC Reset requires max 10 us delay */
1279 writel (OHCI_HCR, &ohci->regs->cmdstatus);
1280 while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1281 if (--timeout == 0) {
1282 err("USB HC reset timed out!");
1283 return -1;
1284 }
1285 udelay (1);
1286 }
1287 return 0;
1288}
1289
1290/*-------------------------------------------------------------------------*/
1291
1292/* Start an OHCI controller, set the BUS operational
1293 * enable interrupts
1294 * connect the virtual root hub */
1295
1296static int hc_start (ohci_t * ohci)
1297{
1298 __u32 mask;
1299 unsigned int fminterval;
1300
1301 ohci->disabled = 1;
1302
1303 /* Tell the controller where the control and bulk lists are
1304 * The lists are empty now. */
1305
1306 writel (0, &ohci->regs->ed_controlhead);
1307 writel (0, &ohci->regs->ed_bulkhead);
1308
1309 writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
1310
1311 fminterval = 0x2edf;
1312 writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
1313 fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1314 writel (fminterval, &ohci->regs->fminterval);
1315 writel (0x628, &ohci->regs->lsthresh);
1316
1317 /* start controller operations */
1318 ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1319 ohci->disabled = 0;
1320 writel (ohci->hc_control, &ohci->regs->control);
1321
1322 /* disable all interrupts */
1323 mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1324 OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1325 OHCI_INTR_OC | OHCI_INTR_MIE);
1326 writel (mask, &ohci->regs->intrdisable);
1327 /* clear all interrupts */
1328 mask &= ~OHCI_INTR_MIE;
1329 writel (mask, &ohci->regs->intrstatus);
1330 /* Choose the interrupts we care about now - but w/o MIE */
1331 mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1332 writel (mask, &ohci->regs->intrenable);
1333
1334#ifdef OHCI_USE_NPS
1335 /* required for AMD-756 and some Mac platforms */
1336 writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
1337 &ohci->regs->roothub.a);
1338 writel (RH_HS_LPSC, &ohci->regs->roothub.status);
1339#endif /* OHCI_USE_NPS */
1340
wdenk5f495752004-02-26 23:46:20 +00001341 /* POTPGT delay is bits 24-31, in 2 ms units. */
1342 mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
1343
1344 /* connect the virtual root hub */
1345 ohci->rh.devnum = 0;
1346
1347 return 0;
1348}
1349
1350/*-------------------------------------------------------------------------*/
1351
1352/* an interrupt happens */
1353
1354static int
1355hc_interrupt (void)
1356{
1357 ohci_t *ohci = &gohci;
1358 struct ohci_regs *regs = ohci->regs;
1359 int ints;
1360 int stat = -1;
Wolfgang Denkd06ce5d2005-08-02 17:06:17 +02001361
Wolfgang Denkc7a4f7d2005-07-21 11:57:57 +02001362 if ((ohci->hcca->done_head != 0) &&
1363 !(ohci_cpu_to_le32(ohci->hcca->done_head) & 0x01)) {
wdenk5f495752004-02-26 23:46:20 +00001364
Wolfgang Denkc7a4f7d2005-07-21 11:57:57 +02001365 ints = OHCI_INTR_WDH;
1366
1367 } else if ((ints = readl (&regs->intrstatus)) == ~(u32)0) {
1368 ohci->disabled++;
1369 err ("%s device removed!", ohci->slot_name);
1370 return -1;
Wolfgang Denkd06ce5d2005-08-02 17:06:17 +02001371
Wolfgang Denkc7a4f7d2005-07-21 11:57:57 +02001372 } else if ((ints &= readl (&regs->intrenable)) == 0) {
1373 dbg("hc_interrupt: returning..\n");
1374 return 0xff;
wdenk5f495752004-02-26 23:46:20 +00001375 }
1376
1377 /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
1378
1379 if (ints & OHCI_INTR_RHSC) {
1380 got_rhsc = 1;
Wolfgang Denkc7a4f7d2005-07-21 11:57:57 +02001381 stat = 0xff;
wdenk5f495752004-02-26 23:46:20 +00001382 }
1383
1384 if (ints & OHCI_INTR_UE) {
1385 ohci->disabled++;
1386 err ("OHCI Unrecoverable Error, controller usb-%s disabled",
1387 ohci->slot_name);
1388 /* e.g. due to PCI Master/Target Abort */
1389
1390#ifdef DEBUG
1391 ohci_dump (ohci, 1);
1392#endif
1393 /* FIXME: be optimistic, hope that bug won't repeat often. */
1394 /* Make some non-interrupt context restart the controller. */
1395 /* Count and limit the retries though; either hardware or */
1396 /* software errors can go forever... */
1397 hc_reset (ohci);
1398 return -1;
1399 }
1400
1401 if (ints & OHCI_INTR_WDH) {
1402 writel (OHCI_INTR_WDH, &regs->intrdisable);
1403 stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
1404 writel (OHCI_INTR_WDH, &regs->intrenable);
1405 }
1406
1407 if (ints & OHCI_INTR_SO) {
1408 dbg("USB Schedule overrun\n");
1409 writel (OHCI_INTR_SO, &regs->intrenable);
1410 stat = -1;
1411 }
1412
1413 /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
1414 if (ints & OHCI_INTR_SF) {
1415 unsigned int frame = ohci_cpu_to_le16 (ohci->hcca->frame_no) & 1;
Mike Frysinger60ce19a2012-03-05 13:47:00 +00001416 mdelay(1);
wdenk5f495752004-02-26 23:46:20 +00001417 writel (OHCI_INTR_SF, &regs->intrdisable);
1418 if (ohci->ed_rm_list[frame] != NULL)
1419 writel (OHCI_INTR_SF, &regs->intrenable);
1420 stat = 0xff;
1421 }
1422
1423 writel (ints, &regs->intrstatus);
1424 return stat;
1425}
1426
1427/*-------------------------------------------------------------------------*/
1428
1429/*-------------------------------------------------------------------------*/
1430
1431/* De-allocate all resources.. */
1432
1433static void hc_release_ohci (ohci_t *ohci)
1434{
1435 dbg ("USB HC release ohci usb-%s", ohci->slot_name);
1436
1437 if (!ohci->disabled)
1438 hc_reset (ohci);
1439}
1440
1441/*-------------------------------------------------------------------------*/
1442
1443/*
1444 * low level initalisation routine, called from usb.c
1445 */
1446static char ohci_inited = 0;
1447
Troy Kisky8f9c49d2013-10-10 15:27:56 -07001448int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
wdenk5f495752004-02-26 23:46:20 +00001449{
1450
1451 /* Set the USB Clock */
wdenk369d43d2004-03-14 14:09:05 +00001452 *(vu_long *)MPC5XXX_CDM_48_FDC = CONFIG_USB_CLOCK;
wdenkacd9b102004-03-14 00:59:59 +00001453
Eric Millbrandt02848522009-08-13 08:32:37 -05001454#ifdef CONFIG_PSC3_USB /* USB is using the alternate configuration */
1455 /* remove all PSC3 USB bits first before ORing in ours */
1456 *(vu_long *)MPC5XXX_GPS_PORT_CONFIG &= ~0x00804f00;
1457#else
wdenkacd9b102004-03-14 00:59:59 +00001458 /* remove all USB bits first before ORing in ours */
1459 *(vu_long *)MPC5XXX_GPS_PORT_CONFIG &= ~0x00807000;
Eric Millbrandt02848522009-08-13 08:32:37 -05001460#endif
wdenk5f495752004-02-26 23:46:20 +00001461 /* Activate USB port */
wdenk369d43d2004-03-14 14:09:05 +00001462 *(vu_long *)MPC5XXX_GPS_PORT_CONFIG |= CONFIG_USB_CONFIG;
wdenk5f495752004-02-26 23:46:20 +00001463
1464 memset (&gohci, 0, sizeof (ohci_t));
1465 memset (&urb_priv, 0, sizeof (urb_priv_t));
1466
1467 /* align the storage */
1468 if ((__u32)&ghcca[0] & 0xff) {
1469 err("HCCA not aligned!!");
1470 return -1;
1471 }
1472 phcca = &ghcca[0];
1473 info("aligned ghcca %p", phcca);
1474 memset(&ohci_dev, 0, sizeof(struct ohci_device));
1475 if ((__u32)&ohci_dev.ed[0] & 0x7) {
1476 err("EDs not aligned!!");
1477 return -1;
1478 }
1479 memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
1480 if ((__u32)gtd & 0x7) {
1481 err("TDs not aligned!!");
1482 return -1;
1483 }
1484 ptd = gtd;
1485 gohci.hcca = phcca;
1486 memset (phcca, 0, sizeof (struct ohci_hcca));
1487
1488 gohci.disabled = 1;
1489 gohci.sleeping = 0;
1490 gohci.irq = -1;
1491 gohci.regs = (struct ohci_regs *)MPC5XXX_USB;
1492
1493 gohci.flags = 0;
1494 gohci.slot_name = "mpc5200";
1495
1496 if (hc_reset (&gohci) < 0) {
1497 hc_release_ohci (&gohci);
1498 return -1;
1499 }
1500
1501 if (hc_start (&gohci) < 0) {
1502 err ("can't start usb-%s", gohci.slot_name);
1503 hc_release_ohci (&gohci);
1504 return -1;
1505 }
1506
1507#ifdef DEBUG
1508 ohci_dump (&gohci, 1);
1509#endif
1510 ohci_inited = 1;
Wolfgang Denkc7a4f7d2005-07-21 11:57:57 +02001511 urb_finished = 1;
1512
wdenk5f495752004-02-26 23:46:20 +00001513 return 0;
1514}
1515
Lucas Stacha3231282012-09-26 00:14:34 +02001516int usb_lowlevel_stop(int index)
wdenk5f495752004-02-26 23:46:20 +00001517{
1518 /* this gets called really early - before the controller has */
1519 /* even been initialized! */
1520 if (!ohci_inited)
1521 return 0;
1522 /* TODO release any interrupts, etc. */
1523 /* call hc_release_ohci() here ? */
1524 hc_reset (&gohci);
1525 return 0;
1526}
1527
1528#endif /* CONFIG_USB_OHCI */