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git01.mediatek.com / filogic / uboot / 713d64816a2496f21464090393c5fd9855bd26dc / . / arch / arm / dts / sam9x60ek.dts
blob: 77edd593b41658fa1ec4cac30e072c18a01e5c59 [file] [log] [blame]
Sandeep Sheriker Mallikarjun976c2dc2019-09-27 13:08:45 +0000[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * sam9x60ek.dts - Device Tree file for SAM9X60 EK board
4 *
5 * Copyright (C) 2018 Microchip Technology Inc. and its subsidiaries
6 *
7 * Author: Sandeep Sheriker M <Sandeepsheriker.mallikarjun@microchip.com>
8 */
9/dts-v1/;
10#include "sam9x60.dtsi"
11
12/ {
13 model = "Microchip SAM9X60-Ek";
14 compatible = "microchip,sam9x60ek", "microchip,sam9x60", "atmel,at91sam9";
15
16 chosen {
17 stdout-path = &dbgu;
Eugen Hristeveeb172b2019-10-09 09:23:41 +0000[diff] [blame]18 i2c0 = &flx0;
Sandeep Sheriker Mallikarjun976c2dc2019-09-27 13:08:45 +0000[diff] [blame]19 };
Tudor Ambarus6c8b9502019-09-27 13:09:19 +0000[diff] [blame]20
Claudiu Beznea3de09762020-10-07 18:17:09 +0300[diff] [blame]21 clocks {
22 slow_xtal: slow_xtal {
23 clock-frequency = <32768>;
24 };
25
26 main_xtal: main_xtal {
27 clock-frequency = <24000000>;
28 };
29 };
30
Eugen Hristeve3b47be2019-09-30 07:28:59 +0000[diff] [blame]31 onewire_tm: onewire {
Eugen Hristev87a31d72021-06-23 16:13:35 +0300[diff] [blame]32 gpios = <&pioD 14 GPIO_ACTIVE_HIGH>;
Eugen Hristeve3b47be2019-09-30 07:28:59 +0000[diff] [blame]33 pinctrl-names = "default";
34 pinctrl-0 = <&pinctrl_onewire_tm_default>;
35 status = "okay";
36
37 w1_eeprom: w1_eeprom@0 {
38 compatible = "maxim,ds24b33";
39 status = "okay";
40 };
41 };
42
Tudor Ambarus6c8b9502019-09-27 13:09:19 +0000[diff] [blame]43 ahb {
44 apb {
45 qspi: spi@f0014000 {
46 pinctrl-names = "default";
47 pinctrl-0 = <&pinctrl_qspi>;
48 status = "okay";
49
50 nor_flash: sst26vf064@0 {
51 compatible = "spi-flash";
52 reg = <0>;
53 spi-max-frequency = <80000000>;
54 spi-rx-bus-width = <4>;
55 spi-tx-bus-width = <4>;
56 };
57 };
58
Eugen Hristeveeb172b2019-10-09 09:23:41 +0000[diff] [blame]59 flx0: flexcom@f801c600 {
60 atmel,flexcom-mode = <3>;
61 status = "okay";
62
63 i2c@600 {
64 compatible = "atmel,sama5d2-i2c";
65 reg = <0x600 0x200>;
66 pinctrl-names = "default";
67 pinctrl-0 = <&pinctrl_flx0>;
68 #address-cells = <1>;
69 #size-cells = <0>;
Claudiu Beznea562a8642020-10-07 18:17:12 +0300[diff] [blame]70 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
Eugen Hristeveeb172b2019-10-09 09:23:41 +0000[diff] [blame]71 status = "okay";
72
73 eeprom@53 {
74 compatible = "atmel,24c32";
75 reg = <0x53>;
76 pagesize = <16>;
77 };
78 };
79 };
80
Tudor Ambarus6c8b9502019-09-27 13:09:19 +0000[diff] [blame]81 pinctrl {
82 pinctrl_qspi: qspi {
83 atmel,pins =
84 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE
85 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE
86 AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
87 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
88 AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
89 AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
90 };
91
Eugen Hristeveeb172b2019-10-09 09:23:41 +0000[diff] [blame]92 pinctrl_flx0: flx0_default {
93 atmel,pins =
94 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE
95 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
96 };
97
Eugen Hristeve3b47be2019-09-30 07:28:59 +0000[diff] [blame]98 pinctrl_onewire_tm_default: onewire_tm_default {
99 atmel,pins =
100 <AT91_PIOD 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
101 };
102
Tudor Ambarus6c8b9502019-09-27 13:09:19 +0000[diff] [blame]103 };
104 };
105 };
Sandeep Sheriker Mallikarjun976c2dc2019-09-27 13:08:45 +0000[diff] [blame]106};
Nicolas Ferred7d06bf2019-09-27 13:08:48 +0000[diff] [blame]107
108&macb0 {
109 phy-mode = "rmii";
110 status = "okay";
111};