Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2001 |
| 4 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | /* |
| 8 | * Date & Time support for Philips PCF8563 RTC |
| 9 | */ |
| 10 | |
| 11 | /* #define DEBUG */ |
| 12 | |
| 13 | #include <common.h> |
| 14 | #include <command.h> |
| 15 | #include <rtc.h> |
| 16 | #include <i2c.h> |
| 17 | |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 18 | static uchar rtc_read (uchar reg); |
| 19 | static void rtc_write (uchar reg, uchar val); |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 20 | |
| 21 | /* ------------------------------------------------------------------------- */ |
| 22 | |
Yuri Tikhonov | 9bacd94 | 2008-03-20 17:56:04 +0300 | [diff] [blame] | 23 | int rtc_get (struct rtc_time *tmp) |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 24 | { |
Yuri Tikhonov | 9bacd94 | 2008-03-20 17:56:04 +0300 | [diff] [blame] | 25 | int rel = 0; |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 26 | uchar sec, min, hour, mday, wday, mon_cent, year; |
| 27 | |
| 28 | sec = rtc_read (0x02); |
| 29 | min = rtc_read (0x03); |
| 30 | hour = rtc_read (0x04); |
| 31 | mday = rtc_read (0x05); |
| 32 | wday = rtc_read (0x06); |
| 33 | mon_cent= rtc_read (0x07); |
| 34 | year = rtc_read (0x08); |
| 35 | |
| 36 | debug ( "Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x " |
| 37 | "hr: %02x min: %02x sec: %02x\n", |
| 38 | year, mon_cent, mday, wday, |
| 39 | hour, min, sec ); |
| 40 | debug ( "Alarms: wday: %02x day: %02x hour: %02x min: %02x\n", |
| 41 | rtc_read (0x0C), |
| 42 | rtc_read (0x0B), |
| 43 | rtc_read (0x0A), |
| 44 | rtc_read (0x09) ); |
| 45 | |
| 46 | if (sec & 0x80) { |
wdenk | 42c0547 | 2004-03-23 22:14:11 +0000 | [diff] [blame] | 47 | puts ("### Warning: RTC Low Voltage - date/time not reliable\n"); |
Yuri Tikhonov | 9bacd94 | 2008-03-20 17:56:04 +0300 | [diff] [blame] | 48 | rel = -1; |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 49 | } |
| 50 | |
| 51 | tmp->tm_sec = bcd2bin (sec & 0x7F); |
| 52 | tmp->tm_min = bcd2bin (min & 0x7F); |
| 53 | tmp->tm_hour = bcd2bin (hour & 0x3F); |
| 54 | tmp->tm_mday = bcd2bin (mday & 0x3F); |
| 55 | tmp->tm_mon = bcd2bin (mon_cent & 0x1F); |
Benoît Thébaudeau | 71d4389 | 2012-07-20 16:05:36 +0200 | [diff] [blame] | 56 | tmp->tm_year = bcd2bin (year) + ((mon_cent & 0x80) ? 1900 : 2000); |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 57 | tmp->tm_wday = bcd2bin (wday & 0x07); |
| 58 | tmp->tm_yday = 0; |
| 59 | tmp->tm_isdst= 0; |
| 60 | |
| 61 | debug ( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", |
| 62 | tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, |
| 63 | tmp->tm_hour, tmp->tm_min, tmp->tm_sec); |
Yuri Tikhonov | 9bacd94 | 2008-03-20 17:56:04 +0300 | [diff] [blame] | 64 | |
| 65 | return rel; |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 66 | } |
| 67 | |
Jean-Christophe PLAGNIOL-VILLARD | 97a2e10 | 2008-09-01 23:06:23 +0200 | [diff] [blame] | 68 | int rtc_set (struct rtc_time *tmp) |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 69 | { |
| 70 | uchar century; |
| 71 | |
| 72 | debug ( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", |
| 73 | tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, |
| 74 | tmp->tm_hour, tmp->tm_min, tmp->tm_sec); |
| 75 | |
| 76 | rtc_write (0x08, bin2bcd(tmp->tm_year % 100)); |
| 77 | |
Benoît Thébaudeau | 71d4389 | 2012-07-20 16:05:36 +0200 | [diff] [blame] | 78 | century = (tmp->tm_year >= 2000) ? 0 : 0x80; |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 79 | rtc_write (0x07, bin2bcd(tmp->tm_mon) | century); |
| 80 | |
| 81 | rtc_write (0x06, bin2bcd(tmp->tm_wday)); |
| 82 | rtc_write (0x05, bin2bcd(tmp->tm_mday)); |
| 83 | rtc_write (0x04, bin2bcd(tmp->tm_hour)); |
| 84 | rtc_write (0x03, bin2bcd(tmp->tm_min )); |
| 85 | rtc_write (0x02, bin2bcd(tmp->tm_sec )); |
Jean-Christophe PLAGNIOL-VILLARD | 97a2e10 | 2008-09-01 23:06:23 +0200 | [diff] [blame] | 86 | |
| 87 | return 0; |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 88 | } |
| 89 | |
| 90 | void rtc_reset (void) |
| 91 | { |
| 92 | /* clear all control & status registers */ |
| 93 | rtc_write (0x00, 0x00); |
| 94 | rtc_write (0x01, 0x00); |
| 95 | rtc_write (0x0D, 0x00); |
| 96 | |
| 97 | /* clear Voltage Low bit */ |
| 98 | rtc_write (0x02, rtc_read (0x02) & 0x7F); |
| 99 | |
| 100 | /* reset all alarms */ |
| 101 | rtc_write (0x09, 0x00); |
| 102 | rtc_write (0x0A, 0x00); |
| 103 | rtc_write (0x0B, 0x00); |
| 104 | rtc_write (0x0C, 0x00); |
| 105 | } |
| 106 | |
| 107 | /* ------------------------------------------------------------------------- */ |
| 108 | |
| 109 | static uchar rtc_read (uchar reg) |
| 110 | { |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 111 | return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg)); |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 112 | } |
| 113 | |
| 114 | static void rtc_write (uchar reg, uchar val) |
| 115 | { |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 116 | i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val); |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 117 | } |