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git01.mediatek.com / filogic / uboot / 710966ed4a5d630cdce3cc541ae43b9fe40cc148 / . / configs / ls1021atsn_qspi_defconfig
blob: f3fa0c489333fc8b41591494cda890372160dddc [file] [log] [blame]
Jianchao Wange5332ba2019-07-19 00:30:01 +0300[diff] [blame]1CONFIG_ARM=y
2CONFIG_TARGET_LS1021ATSN=y
3CONFIG_SYS_TEXT_BASE=0x40100000
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]4CONFIG_ENV_SIZE=0x2000
5CONFIG_ENV_OFFSET=0x300000
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]6CONFIG_ENV_SECT_SIZE=0x40000
Tom Rini6bd3b142020-02-06 13:42:52 -0500[diff] [blame]7CONFIG_DM_GPIO=y
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]8CONFIG_NR_DRAM_BANKS=1
Tom Rini84610272020-07-28 08:46:52 -0400[diff] [blame]9CONFIG_DEFAULT_DEVICE_TREE="ls1021a-tsn"
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]10CONFIG_AHCI=y
11CONFIG_DISTRO_DEFAULTS=y
12CONFIG_FIT=y
13CONFIG_OF_BOARD_SETUP=y
14CONFIG_OF_STDOUT_VIA_ALIAS=y
Jianchao Wange5332ba2019-07-19 00:30:01 +0300[diff] [blame]15CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
16CONFIG_QSPI_BOOT=y
17CONFIG_BOOTDELAY=3
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]18CONFIG_SILENT_CONSOLE=y
19CONFIG_MISC_INIT_R=y
Jianchao Wange5332ba2019-07-19 00:30:01 +0300[diff] [blame]20CONFIG_CMD_GREPENV=y
21CONFIG_CMD_MEMINFO=y
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]22CONFIG_CMD_DM=y
Jianchao Wange5332ba2019-07-19 00:30:01 +0300[diff] [blame]23CONFIG_CMD_GPT=y
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]24CONFIG_CMD_I2C=y
25CONFIG_CMD_MMC=y
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]26CONFIG_CMD_USB=y
27CONFIG_CMD_FS_UUID=y
Jianchao Wange5332ba2019-07-19 00:30:01 +0300[diff] [blame]28CONFIG_OF_CONTROL=y
Adam Ford710966e2020-07-03 06:48:56 -0500[diff] [blame^]29CONFIG_ENV_OVERWRITE=y
Jianchao Wange5332ba2019-07-19 00:30:01 +0300[diff] [blame]30CONFIG_ENV_IS_IN_SPI_FLASH=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]31CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Jianchao Wange5332ba2019-07-19 00:30:01 +0300[diff] [blame]32CONFIG_DM=y
33CONFIG_FSL_CAAM=y
Tom Rini6bd3b142020-02-06 13:42:52 -0500[diff] [blame]34CONFIG_DM_I2C=y
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]35CONFIG_DM_MMC=y
36CONFIG_FSL_ESDHC=y
Miquel Raynal2e35dbb2019-10-03 19:50:05 +0200[diff] [blame]37CONFIG_MTD=y
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]38CONFIG_DM_SPI_FLASH=y
Jianchao Wange5332ba2019-07-19 00:30:01 +0300[diff] [blame]39CONFIG_SPI_FLASH_ATMEL=y
Jianchao Wange5332ba2019-07-19 00:30:01 +0300[diff] [blame]40CONFIG_SPI_FLASH_SPANSION=y
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]41CONFIG_SPI_FLASH_STMICRO=y
42CONFIG_SPI_FLASH_DATAFLASH=y
43CONFIG_PHY_ATHEROS=y
44CONFIG_PHY_BROADCOM=y
45CONFIG_PHY_FIXED=y
Jianchao Wange5332ba2019-07-19 00:30:01 +0300[diff] [blame]46CONFIG_DM_ETH=y
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]47CONFIG_PHY_GIGE=y
Jianchao Wange5332ba2019-07-19 00:30:01 +0300[diff] [blame]48CONFIG_MII=y
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]49CONFIG_TSEC_ENET=y
50CONFIG_PCI=y
51CONFIG_DM_PCI=y
52CONFIG_DM_PCI_COMPAT=y
Hou Zhiqiang02f1f062020-07-09 23:31:42 +0800[diff] [blame]53CONFIG_PCIE_LAYERSCAPE_RC=y
Jianchao Wange5332ba2019-07-19 00:30:01 +0300[diff] [blame]54CONFIG_SYS_NS16550=y
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]55CONFIG_SPI=y
Jianchao Wange5332ba2019-07-19 00:30:01 +0300[diff] [blame]56CONFIG_DM_SPI=y
Jianchao Wange5332ba2019-07-19 00:30:01 +0300[diff] [blame]57CONFIG_FSL_DSPI=y
58CONFIG_FSL_QSPI=y
Jianchao Wange5332ba2019-07-19 00:30:01 +0300[diff] [blame]59CONFIG_USB=y
60CONFIG_DM_USB=y
Jianchao Wange5332ba2019-07-19 00:30:01 +0300[diff] [blame]61CONFIG_USB_XHCI_HCD=y
Jianchao Wange5332ba2019-07-19 00:30:01 +0300[diff] [blame]62CONFIG_USB_XHCI_DWC3=y