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Jean-Christophe PLAGNIOL-VILLARDd5ee38e2009-03-27 23:26:42 +01001/*
2 * [origin: Linux kernel drivers/watchdog/at91sam9_wdt.c]
3 *
4 * Watchdog driver for Atmel AT91SAM9x processors.
5 *
6 * Copyright (C) 2008 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
7 * Copyright (C) 2008 Renaud CERRATO r.cerrato@til-technologies.fr
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15/*
16 * The Watchdog Timer Mode Register can be only written to once. If the
17 * timeout need to be set from U-Boot, be sure that the bootstrap doesn't
18 * write to this register. Inform Linux to it too
19 */
20
21#include <common.h>
22#include <watchdog.h>
23#include <asm/arch/hardware.h>
24#include <asm/arch/io.h>
25#include <asm/arch/at91_wdt.h>
26
27/*
28 * AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
29 * use this to convert a watchdog
30 * value from/to milliseconds.
31 */
32#define ms_to_ticks(t) (((t << 8) / 1000) - 1)
33#define ticks_to_ms(t) (((t + 1) * 1000) >> 8)
34
35/* Hardware timeout in seconds */
36#define WDT_HW_TIMEOUT 2
37
38/*
39 * Set the watchdog time interval in 1/256Hz (write-once)
40 * Counter is 12 bit.
41 */
42static int at91_wdt_settimeout(unsigned int timeout)
43{
44 unsigned int reg;
45 unsigned int mr;
46
47 /* Check if disabled */
48 mr = at91_sys_read(AT91_WDT_MR);
49 if (mr & AT91_WDT_WDDIS) {
50 printf("sorry, watchdog is disabled\n");
51 return -1;
52 }
53
54 /*
55 * All counting occurs at SLOW_CLOCK / 128 = 256 Hz
56 *
57 * Since WDV is a 12-bit counter, the maximum period is
58 * 4096 / 256 = 16 seconds.
59 */
60 reg = AT91_WDT_WDRSTEN /* causes watchdog reset */
61 /* | AT91_WDT_WDRPROC causes processor reset only */
62 | AT91_WDT_WDDBGHLT /* disabled in debug mode */
63 | AT91_WDT_WDD /* restart at any time */
64 | (timeout & AT91_WDT_WDV); /* timer value */
65 at91_sys_write(AT91_WDT_MR, reg);
66
67 return 0;
68}
69
70void hw_watchdog_reset(void)
71{
72 at91_sys_write(AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
73}
74
75void hw_watchdog_init(void)
76{
77 /* 16 seconds timer, resets enabled */
78 at91_wdt_settimeout(ms_to_ticks(WDT_HW_TIMEOUT * 1000));
79}