Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Albert ARIBAUD \(3ADEV\) | ee69a39 | 2015-03-31 11:40:51 +0200 | [diff] [blame] | 2 | /* |
| 3 | * WORK Microwave work_92105 board configuration file |
| 4 | * |
| 5 | * (C) Copyright 2014 DENX Software Engineering GmbH |
| 6 | * Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr> |
Albert ARIBAUD \(3ADEV\) | ee69a39 | 2015-03-31 11:40:51 +0200 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #ifndef __CONFIG_WORK_92105_H__ |
| 10 | #define __CONFIG_WORK_92105_H__ |
| 11 | |
| 12 | /* SoC and board defines */ |
| 13 | #include <linux/sizes.h> |
| 14 | #include <asm/arch/cpu.h> |
| 15 | |
| 16 | /* |
Albert ARIBAUD \(3ADEV\) | ee69a39 | 2015-03-31 11:40:51 +0200 | [diff] [blame] | 17 | * Memory configurations |
| 18 | */ |
Albert ARIBAUD \(3ADEV\) | ee69a39 | 2015-03-31 11:40:51 +0200 | [diff] [blame] | 19 | #define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE |
| 20 | #define CONFIG_SYS_SDRAM_SIZE SZ_128M |
Albert ARIBAUD \(3ADEV\) | ee69a39 | 2015-03-31 11:40:51 +0200 | [diff] [blame] | 21 | |
Albert ARIBAUD \(3ADEV\) | ee69a39 | 2015-03-31 11:40:51 +0200 | [diff] [blame] | 22 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_512K \ |
| 23 | - GENERATED_GBL_DATA_SIZE) |
| 24 | |
| 25 | /* |
Albert ARIBAUD \(3ADEV\) | ee69a39 | 2015-03-31 11:40:51 +0200 | [diff] [blame] | 26 | * Ethernet Driver |
| 27 | */ |
| 28 | |
Albert ARIBAUD \(3ADEV\) | ee69a39 | 2015-03-31 11:40:51 +0200 | [diff] [blame] | 29 | #define CONFIG_LPC32XX_ETH |
Albert ARIBAUD \(3ADEV\) | ee69a39 | 2015-03-31 11:40:51 +0200 | [diff] [blame] | 30 | #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN |
Albert ARIBAUD \(3ADEV\) | ee69a39 | 2015-03-31 11:40:51 +0200 | [diff] [blame] | 31 | /* FIXME: remove "Waiting for PHY auto negotiation to complete..." message */ |
| 32 | |
Albert ARIBAUD \(3ADEV\) | ee69a39 | 2015-03-31 11:40:51 +0200 | [diff] [blame] | 33 | #define CONFIG_RTC_DS1374 |
| 34 | |
| 35 | /* |
Albert ARIBAUD \(3ADEV\) | ee69a39 | 2015-03-31 11:40:51 +0200 | [diff] [blame] | 36 | * U-Boot General Configurations |
| 37 | */ |
Albert ARIBAUD \(3ADEV\) | ee69a39 | 2015-03-31 11:40:51 +0200 | [diff] [blame] | 38 | #define CONFIG_SYS_CBSIZE 1024 |
Albert ARIBAUD \(3ADEV\) | ee69a39 | 2015-03-31 11:40:51 +0200 | [diff] [blame] | 39 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
| 40 | |
Albert ARIBAUD \(3ADEV\) | ee69a39 | 2015-03-31 11:40:51 +0200 | [diff] [blame] | 41 | /* |
Albert ARIBAUD \(3ADEV\) | ee69a39 | 2015-03-31 11:40:51 +0200 | [diff] [blame] | 42 | * NAND chip timings for FIXME: which one? |
| 43 | */ |
| 44 | |
| 45 | #define CONFIG_LPC32XX_NAND_MLC_TCEA_DELAY 333333333 |
| 46 | #define CONFIG_LPC32XX_NAND_MLC_BUSY_DELAY 10000000 |
| 47 | #define CONFIG_LPC32XX_NAND_MLC_NAND_TA 18181818 |
| 48 | #define CONFIG_LPC32XX_NAND_MLC_RD_HIGH 31250000 |
| 49 | #define CONFIG_LPC32XX_NAND_MLC_RD_LOW 45454545 |
| 50 | #define CONFIG_LPC32XX_NAND_MLC_WR_HIGH 40000000 |
| 51 | #define CONFIG_LPC32XX_NAND_MLC_WR_LOW 83333333 |
| 52 | |
| 53 | /* |
| 54 | * NAND |
| 55 | */ |
| 56 | |
| 57 | /* driver configuration */ |
| 58 | #define CONFIG_SYS_NAND_SELF_INIT |
| 59 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 60 | #define CONFIG_SYS_MAX_NAND_CHIPS 1 |
| 61 | #define CONFIG_SYS_NAND_BASE MLC_NAND_BASE |
Albert ARIBAUD \(3ADEV\) | ee69a39 | 2015-03-31 11:40:51 +0200 | [diff] [blame] | 62 | |
Albert ARIBAUD \(3ADEV\) | ee69a39 | 2015-03-31 11:40:51 +0200 | [diff] [blame] | 63 | /* |
| 64 | * GPIO |
| 65 | */ |
| 66 | |
Albert ARIBAUD \(3ADEV\) | ee69a39 | 2015-03-31 11:40:51 +0200 | [diff] [blame] | 67 | #define CONFIG_LPC32XX_GPIO |
| 68 | |
| 69 | /* |
Albert ARIBAUD \(3ADEV\) | ee69a39 | 2015-03-31 11:40:51 +0200 | [diff] [blame] | 70 | * Environment |
| 71 | */ |
| 72 | |
Albert ARIBAUD \(3ADEV\) | ee69a39 | 2015-03-31 11:40:51 +0200 | [diff] [blame] | 73 | /* |
Albert ARIBAUD \(3ADEV\) | ee69a39 | 2015-03-31 11:40:51 +0200 | [diff] [blame] | 74 | * Boot Linux |
| 75 | */ |
Albert ARIBAUD \(3ADEV\) | ee69a39 | 2015-03-31 11:40:51 +0200 | [diff] [blame] | 76 | |
Albert ARIBAUD \(3ADEV\) | ee69a39 | 2015-03-31 11:40:51 +0200 | [diff] [blame] | 77 | #define CONFIG_BOOTFILE "uImage" |
Albert ARIBAUD \(3ADEV\) | ee69a39 | 2015-03-31 11:40:51 +0200 | [diff] [blame] | 78 | |
| 79 | /* |
| 80 | * SPL |
| 81 | */ |
| 82 | |
| 83 | /* SPL will be executed at offset 0 */ |
Albert ARIBAUD \(3ADEV\) | ee69a39 | 2015-03-31 11:40:51 +0200 | [diff] [blame] | 84 | /* SPL will use SRAM as stack */ |
| 85 | #define CONFIG_SPL_STACK 0x0000FFF8 |
Albert ARIBAUD \(3ADEV\) | ee69a39 | 2015-03-31 11:40:51 +0200 | [diff] [blame] | 86 | /* Use the framework and generic lib */ |
Albert ARIBAUD \(3ADEV\) | ee69a39 | 2015-03-31 11:40:51 +0200 | [diff] [blame] | 87 | /* SPL will use serial */ |
Albert ARIBAUD \(3ADEV\) | ee69a39 | 2015-03-31 11:40:51 +0200 | [diff] [blame] | 88 | /* SPL will load U-Boot from NAND offset 0x40000 */ |
Albert ARIBAUD \(3ADEV\) | ee69a39 | 2015-03-31 11:40:51 +0200 | [diff] [blame] | 89 | #define CONFIG_SPL_PAD_TO 0x20000 |
| 90 | /* U-Boot will be 0x40000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */ |
| 91 | #define CONFIG_SYS_MONITOR_LEN 0x40000 /* actually, MAX size */ |
| 92 | #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE |
| 93 | #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE |
| 94 | |
| 95 | /* |
| 96 | * Include SoC specific configuration |
| 97 | */ |
| 98 | #include <asm/arch/config.h> |
| 99 | |
| 100 | #endif /* __CONFIG_WORK_92105_H__*/ |