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Lokesh Vutla76a36492018-08-27 15:59:09 +05301// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
4 */
5
Andreas Dannenbergbfdf4982019-04-29 12:56:44 -05006#include <dt-bindings/pinctrl/k3.h>
Grygorii Strashko08512392019-07-09 10:30:36 +05307#include <dt-bindings/net/ti-dp83867.h>
Lokesh Vutla76a36492018-08-27 15:59:09 +05308
9/ {
10 chosen {
11 stdout-path = "serial2:115200n8";
12 };
13
14 aliases {
15 serial2 = &main_uart0;
Grygorii Strashkob33dd702019-07-09 10:30:35 +053016 ethernet0 = &cpsw_port1;
Aswath Govindrajudfe082e2020-11-20 21:18:55 +053017 usb0 = &usb0;
18 usb1 = &usb1;
Lokesh Vutla76a36492018-08-27 15:59:09 +053019 };
20};
21
22&cbass_main{
23 u-boot,dm-spl;
Lokesh Vutla76a36492018-08-27 15:59:09 +053024
Lokesh Vutla76a36492018-08-27 15:59:09 +053025 sdhci1: sdhci@04FA0000 {
Faiz Abbasd8fb3092019-06-11 00:43:31 +053026 compatible = "ti,am654-sdhci-5.1";
Lokesh Vutla3d09ed32018-11-02 19:51:08 +053027 reg = <0x0 0x4FA0000 0x0 0x1000>,
28 <0x0 0x4FB0000 0x0 0x400>;
Faiz Abbasdc2bcc22020-01-16 19:42:18 +053029 clocks =<&k3_clks 48 0>, <&k3_clks 48 1>;
30 clock-names = "clk_ahb", "clk_xin";
Lokesh Vutla61ff6a32019-06-07 19:24:47 +053031 power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>;
Lokesh Vutla76a36492018-08-27 15:59:09 +053032 max-frequency = <25000000>;
Faiz Abbasc6eb9e72020-02-26 13:44:33 +053033 ti,otap-del-sel-legacy = <0x0>;
34 ti,otap-del-sel-mmc-hs = <0x0>;
35 ti,otap-del-sel-sd-hs = <0x0>;
36 ti,otap-del-sel-sdr12 = <0x0>;
37 ti,otap-del-sel-sdr25 = <0x0>;
38 ti,otap-del-sel-sdr50 = <0x8>;
39 ti,otap-del-sel-sdr104 = <0x7>;
40 ti,otap-del-sel-ddr50 = <0x4>;
41 ti,otap-del-sel-ddr52 = <0x4>;
42 ti,otap-del-sel-hs200 = <0x7>;
Faiz Abbasaa8d1b72019-06-11 00:43:36 +053043 ti,trm-icp = <0x8>;
Lokesh Vutla76a36492018-08-27 15:59:09 +053044 };
Lokesh Vutla3d09ed32018-11-02 19:51:08 +053045
46};
47
48&cbass_mcu {
49 u-boot,dm-spl;
Grygorii Strashko2d457302019-02-05 17:31:26 +053050
Vignesh Raghavendra01250d82020-07-07 13:43:35 +053051 mcu_navss {
Vignesh Raghavendra1ee79552020-02-04 11:09:51 +053052 u-boot,dm-spl;
Grygorii Strashko2d457302019-02-05 17:31:26 +053053
Vignesh Raghavendra01250d82020-07-07 13:43:35 +053054 ringacc@2b800000 {
Vignesh Raghavendra1ee79552020-02-04 11:09:51 +053055 u-boot,dm-spl;
Grygorii Strashko2d457302019-02-05 17:31:26 +053056 };
57
Vignesh Raghavendra01250d82020-07-07 13:43:35 +053058 dma-controller@285c0000 {
Vignesh Raghavendra1ee79552020-02-04 11:09:51 +053059 u-boot,dm-spl;
Grygorii Strashko2d457302019-02-05 17:31:26 +053060 };
61 };
Lokesh Vutla3d09ed32018-11-02 19:51:08 +053062};
Lokesh Vutla76a36492018-08-27 15:59:09 +053063
Lokesh Vutla3d09ed32018-11-02 19:51:08 +053064&cbass_wakeup {
65 u-boot,dm-spl;
Lokesh Vutla76a36492018-08-27 15:59:09 +053066};
67
Lokesh Vutla3d09ed32018-11-02 19:51:08 +053068&secure_proxy_main {
Lokesh Vutla76a36492018-08-27 15:59:09 +053069 u-boot,dm-spl;
70};
71
72&dmsc {
73 u-boot,dm-spl;
Lokesh Vutla3d09ed32018-11-02 19:51:08 +053074 k3_sysreset: sysreset-controller {
75 compatible = "ti,sci-sysreset";
76 u-boot,dm-spl;
77 };
Lokesh Vutla76a36492018-08-27 15:59:09 +053078};
79
80&k3_pds {
81 u-boot,dm-spl;
82};
83
84&k3_clks {
85 u-boot,dm-spl;
86};
87
88&k3_reset {
89 u-boot,dm-spl;
90};
91
Andreas Dannenbergd20cf7b2019-06-04 18:08:15 -050092&wkup_pmx0 {
93 u-boot,dm-spl;
94
95 wkup_i2c0_pins_default {
96 u-boot,dm-spl;
97 };
98};
99
Lokesh Vutla76a36492018-08-27 15:59:09 +0530100&main_pmx0 {
101 u-boot,dm-spl;
102 main_uart0_pins_default: main_uart0_pins_default {
103 pinctrl-single,pins = <
Andreas Dannenbergbfdf4982019-04-29 12:56:44 -0500104 AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) UART0_RXD */
105 AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (AE11) UART0_TXD */
106 AM65X_IOPAD(0x01ec, PIN_INPUT, 0) /* (AG11) UART0_CTSn */
107 AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */
Lokesh Vutla76a36492018-08-27 15:59:09 +0530108 >;
Lokesh Vutla3d09ed32018-11-02 19:51:08 +0530109 u-boot,dm-spl;
Lokesh Vutla76a36492018-08-27 15:59:09 +0530110 };
111
112 main_mmc0_pins_default: main_mmc0_pins_default {
113 pinctrl-single,pins = <
Andreas Dannenbergbfdf4982019-04-29 12:56:44 -0500114 AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
115 AM65X_IOPAD(0x01aC, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
116 AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */
117 AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */
118 AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */
119 AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */
120 AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */
121 AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */
122 AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */
123 AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */
Faiz Abbasd8fb3092019-06-11 00:43:31 +0530124 AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0) /* (A23) MMC0_SDCD */
125 AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */
Lokesh Vutla76a36492018-08-27 15:59:09 +0530126 >;
Lokesh Vutla3d09ed32018-11-02 19:51:08 +0530127 u-boot,dm-spl;
Lokesh Vutla76a36492018-08-27 15:59:09 +0530128 };
129
130 main_mmc1_pins_default: main_mmc1_pins_default {
131 pinctrl-single,pins = <
Andreas Dannenbergbfdf4982019-04-29 12:56:44 -0500132 AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */
133 AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */
134 AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0) /* (D28) MMC1_DAT0 */
135 AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0) /* (E27) MMC1_DAT1 */
136 AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0) /* (D26) MMC1_DAT2 */
137 AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0) /* (D27) MMC1_DAT3 */
138 AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */
139 AM65X_IOPAD(0x02e0, PIN_INPUT, 0) /* (C24) MMC1_SDWP */
Lokesh Vutla76a36492018-08-27 15:59:09 +0530140 >;
Lokesh Vutla3d09ed32018-11-02 19:51:08 +0530141 u-boot,dm-spl;
Lokesh Vutla76a36492018-08-27 15:59:09 +0530142 };
143
Faiz Abbas07383712020-08-03 11:35:12 +0530144 usb0_pins_default: usb0_pins_default {
145 pinctrl-single,pins = <
146 AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */
147 >;
148 u-boot,dm-spl;
149 };
Lokesh Vutla76a36492018-08-27 15:59:09 +0530150};
151
152&main_pmx1 {
153 u-boot,dm-spl;
154};
155
Grygorii Strashko08512392019-07-09 10:30:36 +0530156&wkup_pmx0 {
157 mcu_cpsw_pins_default: mcu_cpsw_pins_default {
158 pinctrl-single,pins = <
159 AM65X_WKUP_IOPAD(0x0058, PIN_OUTPUT, 0) /* (N4) MCU_RGMII1_TX_CTL */
160 AM65X_WKUP_IOPAD(0x005c, PIN_INPUT, 0) /* (N5) MCU_RGMII1_RX_CTL */
161 AM65X_WKUP_IOPAD(0x0060, PIN_OUTPUT, 0) /* (M2) MCU_RGMII1_TD3 */
162 AM65X_WKUP_IOPAD(0x0064, PIN_OUTPUT, 0) /* (M3) MCU_RGMII1_TD2 */
163 AM65X_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* (M4) MCU_RGMII1_TD1 */
164 AM65X_WKUP_IOPAD(0x006c, PIN_OUTPUT, 0) /* (M5) MCU_RGMII1_TD0 */
165 AM65X_WKUP_IOPAD(0x0078, PIN_INPUT, 0) /* (L2) MCU_RGMII1_RD3 */
166 AM65X_WKUP_IOPAD(0x007c, PIN_INPUT, 0) /* (L5) MCU_RGMII1_RD2 */
167 AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* (M6) MCU_RGMII1_RD1 */
168 AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* (L6) MCU_RGMII1_RD0 */
169 AM65X_WKUP_IOPAD(0x0070, PIN_INPUT, 0) /* (N1) MCU_RGMII1_TXC */
170 AM65X_WKUP_IOPAD(0x0074, PIN_INPUT, 0) /* (M1) MCU_RGMII1_RXC */
171 >;
172 };
173
174 mcu_mdio_pins_default: mcu_mdio1_pins_default {
175 pinctrl-single,pins = <
176 AM65X_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
177 AM65X_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
178 >;
179 };
Vignesh Raghavendra1ee79552020-02-04 11:09:51 +0530180
181 mcu-fss0-ospi0-pins-default {
182 u-boot,dm-spl;
183 };
Grygorii Strashko08512392019-07-09 10:30:36 +0530184};
185
Lokesh Vutla76a36492018-08-27 15:59:09 +0530186&main_uart0 {
187 u-boot,dm-spl;
188 pinctrl-names = "default";
189 pinctrl-0 = <&main_uart0_pins_default>;
190 status = "okay";
191};
192
193&sdhci0 {
194 u-boot,dm-spl;
Lokesh Vutla76a36492018-08-27 15:59:09 +0530195};
196
197&sdhci1 {
198 u-boot,dm-spl;
199 status = "okay";
200 pinctrl-names = "default";
201 pinctrl-0 = <&main_mmc1_pins_default>;
202 sdhci-caps-mask = <0x7 0x0>;
Faiz Abbasaa8d1b72019-06-11 00:43:36 +0530203 ti,driver-strength-ohm = <50>;
Lokesh Vutla76a36492018-08-27 15:59:09 +0530204};
Grygorii Strashko08512392019-07-09 10:30:36 +0530205
206&mcu_cpsw {
207 pinctrl-names = "default";
208 pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
209};
210
211&davinci_mdio {
212 phy0: ethernet-phy@0 {
213 reg = <0>;
214 /* TODO: phy reset: TCA9555RTWR(i2c:0x21)[p04].GPIO_MCU_RGMII_RSTN */
215 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
Grygorii Strashko08512392019-07-09 10:30:36 +0530216 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
217 };
218};
219
220&cpsw_port1 {
Grygorii Strashkodb0d2622019-11-18 23:04:47 +0200221 phy-mode = "rgmii-rxid";
Grygorii Strashko08512392019-07-09 10:30:36 +0530222 phy-handle = <&phy0>;
223};
224
225&mcu_cpsw {
226 reg = <0x0 0x46000000 0x0 0x200000>,
227 <0x0 0x40f00200 0x0 0x2>;
228 reg-names = "cpsw_nuss", "mac_efuse";
Vignesh Raghavendra388b1172020-07-06 13:36:56 +0530229 /delete-property/ ranges;
Grygorii Strashko08512392019-07-09 10:30:36 +0530230
231 cpsw-phy-sel@40f04040 {
232 compatible = "ti,am654-cpsw-phy-sel";
233 reg= <0x0 0x40f04040 0x0 0x4>;
234 reg-names = "gmii-sel";
235 };
236};
Andreas Dannenbergd20cf7b2019-06-04 18:08:15 -0500237
238&wkup_i2c0 {
239 u-boot,dm-spl;
240};
Vignesh Raghavendra5bbcabb2019-12-09 10:37:33 +0530241
242&usb1 {
243 dr_mode = "peripheral";
244};
Vignesh Raghavendra1ee79552020-02-04 11:09:51 +0530245
246&fss {
247 u-boot,dm-spl;
248};
249
250&ospi0 {
251 u-boot,dm-spl;
252
253 flash@0{
254 u-boot,dm-spl;
255 };
256};
Dave Gerlachc70c4962020-07-15 23:40:00 -0500257
258&chipid {
259 u-boot,dm-spl;
260};
Faiz Abbas07383712020-08-03 11:35:12 +0530261
262&dwc3_0 {
263 status = "okay";
264 u-boot,dm-spl;
265};
266
267&usb0_phy {
268 status = "okay";
269 u-boot,dm-spl;
270};
271
272&usb0 {
273 pinctrl-names = "default";
274 pinctrl-0 = <&usb0_pins_default>;
Aswath Govindraju44623c42020-11-20 21:18:54 +0530275 dr_mode = "host";
Faiz Abbas07383712020-08-03 11:35:12 +0530276 u-boot,dm-spl;
277};
278
279&scm_conf {
280 u-boot,dm-spl;
281};