blob: e257c0ec1f4da3407d88bae99110adfe5416b049 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Alexander Grafc3468482014-04-11 17:09:45 +02002/*
3 * Copyright 2011-2014 Freescale Semiconductor, Inc.
Alexander Grafc3468482014-04-11 17:09:45 +02004 */
5
6/*
7 * Corenet DS style board configuration file
8 */
9#ifndef __QEMU_PPCE500_H
10#define __QEMU_PPCE500_H
11
Alexander Grafc3468482014-04-11 17:09:45 +020012#define CONFIG_SYS_MPC85XX_NO_RESETVEC
13
14#define CONFIG_SYS_RAMBOOT
15
Alexander Grafc3468482014-04-11 17:09:45 +020016#define CONFIG_ENABLE_36BIT_PHYS
17
Alexander Grafc3468482014-04-11 17:09:45 +020018/* Needed to fill the ccsrbar pointer */
Alexander Grafc3468482014-04-11 17:09:45 +020019
20/* Virtual address to CCSRBAR */
21#define CONFIG_SYS_CCSRBAR 0xe0000000
22/* Physical address should be a function call */
23#ifndef __ASSEMBLY__
24extern unsigned long long get_phys_ccsrbar_addr_early(void);
Alexander Graf6a2aa502015-03-07 02:10:09 +010025#define CONFIG_SYS_CCSRBAR_PHYS_HIGH (get_phys_ccsrbar_addr_early() >> 32)
26#define CONFIG_SYS_CCSRBAR_PHYS_LOW get_phys_ccsrbar_addr_early()
27#else
28#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0x0
29#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
Alexander Grafc3468482014-04-11 17:09:45 +020030#endif
Alexander Graf6a2aa502015-03-07 02:10:09 +010031
Alexander Grafc3468482014-04-11 17:09:45 +020032/* Virtual address range for PCI region maps */
33#define CONFIG_SYS_PCI_MAP_START 0x80000000
Bin Meng6c6e5582021-02-25 17:22:26 +080034#define CONFIG_SYS_PCI_MAP_END 0xe0000000
Alexander Grafc3468482014-04-11 17:09:45 +020035
36/* Virtual address to a temporary map if we need it (max 128MB) */
37#define CONFIG_SYS_TMPVIRT 0xe8000000
38
39/*
40 * DDR Setup
41 */
42#define CONFIG_VERY_BIG_RAM
43#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
44#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
45
46#define CONFIG_CHIP_SELECTS_PER_CTRL 0
47
Alexander Grafc3468482014-04-11 17:09:45 +020048#define CONFIG_SYS_BOOT_BLOCK 0x00000000 /* boot TLB */
49
50#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
51
Alexander Grafc3468482014-04-11 17:09:45 +020052#define CONFIG_HWCONFIG
53
54#define CONFIG_SYS_INIT_RAM_ADDR 0x00100000
55#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0x0
56#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0x00100000
57/* The assembler doesn't like typecast */
58#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \
59 ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \
60 CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW)
61#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000
62
63#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
64 GENERATED_GBL_DATA_SIZE)
65#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
66
67#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
Alexander Grafc3468482014-04-11 17:09:45 +020068
Alexander Grafc3468482014-04-11 17:09:45 +020069#define CONFIG_LBA48
Alexander Grafc3468482014-04-11 17:09:45 +020070
Bin Meng92f54542021-02-25 17:22:54 +080071/* RTC */
72#define CONFIG_RTC_PT7C4338
73
Alexander Grafc3468482014-04-11 17:09:45 +020074/*
75 * Environment
76 */
Alexander Grafc3468482014-04-11 17:09:45 +020077
78#define CONFIG_LOADS_ECHO /* echo on for serial download */
79
Alexander Grafc3468482014-04-11 17:09:45 +020080/*
Alexander Grafc3468482014-04-11 17:09:45 +020081 * Miscellaneous configurable options
82 */
Alexander Grafc3468482014-04-11 17:09:45 +020083
84/*
85 * For booting Linux, the board info and command line data
86 * have to be in the first 64 MB of memory, since this is
87 * the maximum mapped by the Linux kernel during initialization.
88 */
89#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/
90#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
91
92/*
93 * Environment Configuration
94 */
95#define CONFIG_ROOTPATH "/opt/nfsroot"
96#define CONFIG_BOOTFILE "uImage"
97#define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/
98
Alexander Grafc3468482014-04-11 17:09:45 +020099#endif /* __QEMU_PPCE500_H */