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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Heiko Schocher60301192010-02-22 16:43:02 +05302/*
3 * (C) Copyright 2009
4 * Marvell Semiconductor <www.marvell.com>
5 * Prafulla Wadaskar <prafulla@marvell.com>
6 *
7 * (C) Copyright 2009
8 * Stefan Roese, DENX Software Engineering, sr@denx.de.
9 *
Holger Brunck2ef42952012-07-05 05:37:46 +000010 * (C) Copyright 2011-2012
11 * Holger Brunck, Keymile GmbH Hannover, holger.brunck@keymile.com
12 * Valentin Longchamp, Keymile AG, valentin.longchamp@keymile.com
Heiko Schocher60301192010-02-22 16:43:02 +053013 */
14
15/*
16 * for linking errors see
17 * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
18 */
19
Holger Brunck1f974e92011-06-16 18:11:15 +053020#ifndef _CONFIG_KM_KIRKWOOD_H
21#define _CONFIG_KM_KIRKWOOD_H
Heiko Schocher60301192010-02-22 16:43:02 +053022
Holger Brunckb693ce82012-07-05 05:05:06 +000023/* KM_KIRKWOOD */
Holger Brunck9f03a382012-05-25 01:57:13 +000024#if defined(CONFIG_KM_KIRKWOOD)
Mario Six790d8442018-03-28 14:38:20 +020025#define CONFIG_HOSTNAME "km_kirkwood"
Holger Brunckb693ce82012-07-05 05:05:06 +000026
27/* KM_KIRKWOOD_PCI */
Holger Brunck9f03a382012-05-25 01:57:13 +000028#elif defined(CONFIG_KM_KIRKWOOD_PCI)
Mario Six790d8442018-03-28 14:38:20 +020029#define CONFIG_HOSTNAME "km_kirkwood_pci"
Holger Brunck4dd3bcf2014-08-15 10:51:48 +020030#define CONFIG_KM_UBI_PART_BOOT_OPTS ",2048"
31#define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
Holger Brunckb693ce82012-07-05 05:05:06 +000032
Karlheinz Jerg34544ea2013-09-18 09:32:48 +020033/* KM_KIRKWOOD_128M16 */
34#elif defined(CONFIG_KM_KIRKWOOD_128M16)
Mario Six790d8442018-03-28 14:38:20 +020035#define CONFIG_HOSTNAME "km_kirkwood_128m16"
Karlheinz Jerg34544ea2013-09-18 09:32:48 +020036
Holger Brunck09f34042020-01-13 15:34:02 +010037/* KM_NUSA */
38#elif defined(CONFIG_KM_NUSA)
Gerlando Falauto29ff59a2014-02-13 16:43:00 +010039
Mario Six790d8442018-03-28 14:38:20 +020040#define CONFIG_HOSTNAME "kmnusa"
Gerlando Falauto29ff59a2014-02-13 16:43:00 +010041
Holger Brunckd896d0d2012-07-05 05:05:03 +000042/* KMCOGE5UN */
Holger Brunckf065ce02012-07-05 05:05:02 +000043#elif defined(CONFIG_KM_COGE5UN)
Mario Six790d8442018-03-28 14:38:20 +020044#define CONFIG_HOSTNAME "kmcoge5un"
Holger Brunckc9caa7f2012-07-05 05:05:04 +000045
Holger Brunck55b3c6c2020-01-13 15:34:01 +010046/* KM_SUSE2 */
47#elif defined(CONFIG_KM_SUSE2)
48#define CONFIG_HOSTNAME "kmsuse2"
Holger Brunck55b3c6c2020-01-13 15:34:01 +010049#define CONFIG_KM_UBI_PART_BOOT_OPTS ",2048"
50#define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
Holger Brunck2ef42952012-07-05 05:37:46 +000051#else
52#error ("Board unsupported")
Holger Brunck1f974e92011-06-16 18:11:15 +053053#endif
Heiko Schocher60301192010-02-22 16:43:02 +053054
Holger Brunck2ef42952012-07-05 05:37:46 +000055/* include common defines/options for all arm based Keymile boards */
56#include "km/km_arm.h"
57
Holger Brunck2ef42952012-07-05 05:37:46 +000058#if defined(CONFIG_KM_PIGGY4_88E6352)
59/*
60 * Some keymile boards like mgcoge5un & nusa1 have their PIGGY4 connected via
61 * an Marvell 88E6352 simple switch.
62 * In this case we have to change the default settings for the etherent mac.
63 * There is NO ethernet phy. The ARM and Switch are conencted directly over
64 * RGMII in MAC-MAC mode
65 * In this case 1GBit full duplex and autoneg off
66 */
67#define PORT_SERIAL_CONTROL_VALUE ( \
68 MVGBE_FORCE_LINK_PASS | \
69 MVGBE_DIS_AUTO_NEG_FOR_DUPLX | \
70 MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL | \
71 MVGBE_ADV_NO_FLOW_CTRL | \
72 MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \
73 MVGBE_FORCE_BP_MODE_NO_JAM | \
74 (1 << 9) /* Reserved bit has to be 1 */ | \
75 MVGBE_DO_NOT_FORCE_LINK_FAIL | \
76 MVGBE_DIS_AUTO_NEG_SPEED_GMII | \
77 MVGBE_DTE_ADV_0 | \
78 MVGBE_MIIPHY_MAC_MODE | \
79 MVGBE_AUTO_NEG_NO_CHANGE | \
80 MVGBE_MAX_RX_PACKET_1552BYTE | \
81 MVGBE_CLR_EXT_LOOPBACK | \
82 MVGBE_SET_FULL_DUPLEX_MODE | \
83 MVGBE_EN_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\
84 MVGBE_SET_GMII_SPEED_TO_1000 |\
85 MVGBE_SET_MII_SPEED_TO_100)
86
87#endif
Heiko Schochere4533af2011-03-08 10:53:51 +010088
Holger Brunckd896d0d2012-07-05 05:05:03 +000089#ifdef CONFIG_KM_PIGGY4_88E6061
90/*
Holger Bruncke306c672019-11-25 17:24:15 +010091 * Some keymile boards like mgcoge5un have their PIGGY4 connected via
Holger Brunckd896d0d2012-07-05 05:05:03 +000092 * an Marvell 88E6061 simple switch.
93 * In this case we have to change the default settings for the
94 * ethernet phy connected to the kirkwood.
95 * In this case 100MB full duplex and autoneg off
96 */
97#define PORT_SERIAL_CONTROL_VALUE ( \
98 MVGBE_FORCE_LINK_PASS | \
99 MVGBE_DIS_AUTO_NEG_FOR_DUPLX | \
100 MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL | \
101 MVGBE_ADV_NO_FLOW_CTRL | \
102 MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \
103 MVGBE_FORCE_BP_MODE_NO_JAM | \
104 (1 << 9) /* Reserved bit has to be 1 */ | \
105 MVGBE_DO_NOT_FORCE_LINK_FAIL | \
106 MVGBE_DIS_AUTO_NEG_SPEED_GMII | \
107 MVGBE_DTE_ADV_0 | \
108 MVGBE_MIIPHY_MAC_MODE | \
109 MVGBE_AUTO_NEG_NO_CHANGE | \
110 MVGBE_MAX_RX_PACKET_1552BYTE | \
111 MVGBE_CLR_EXT_LOOPBACK | \
112 MVGBE_SET_FULL_DUPLEX_MODE | \
113 MVGBE_DIS_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\
114 MVGBE_SET_GMII_SPEED_TO_10_100 |\
115 MVGBE_SET_MII_SPEED_TO_100)
116#endif
117
Holger Brunck1f974e92011-06-16 18:11:15 +0530118#endif /* _CONFIG_KM_KIRKWOOD */