Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Kumar Gala | 1c1fe93 | 2010-04-27 00:05:41 -0500 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2010 Freescale Semiconductor, Inc. |
Kumar Gala | 1c1fe93 | 2010-04-27 00:05:41 -0500 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #include <config.h> |
| 7 | #include <common.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 8 | #include <log.h> |
Kumar Gala | 1c1fe93 | 2010-04-27 00:05:41 -0500 | [diff] [blame] | 9 | #include <asm/io.h> |
| 10 | #include <asm/immap_85xx.h> |
| 11 | #include <asm/fsl_serdes.h> |
| 12 | |
| 13 | #define SRDS1_MAX_LANES 4 |
| 14 | |
| 15 | static u32 serdes1_prtcl_map; |
| 16 | |
| 17 | static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { |
| 18 | [0x0] = {PCIE1, NONE, NONE, NONE}, |
| 19 | [0x1] = {SRIO1, SRIO2, SGMII_TSEC1, SGMII_TSEC2}, |
| 20 | [0x2] = {SRIO1, SRIO2, SGMII_TSEC1, SGMII_TSEC2}, |
| 21 | [0x3] = {SRIO1, SRIO2, NONE, NONE}, |
| 22 | [0x4] = {PCIE1, NONE, SGMII_TSEC1, SGMII_TSEC2}, |
| 23 | [0x5] = {PCIE1, PCIE1, SGMII_TSEC1, SGMII_TSEC2}, |
| 24 | [0x6] = {PCIE1, NONE, SRIO1, SRIO2}, |
| 25 | [0x7] = {PCIE1, PCIE1, SRIO1, SRIO2}, |
| 26 | [0x8] = {PCIE1, PCIE1, SRIO1, SRIO2}, |
| 27 | [0x9] = {SRIO1, SRIO1, SRIO1, SRIO1}, |
| 28 | [0xa] = {SRIO1, SRIO1, SRIO1, SRIO1}, |
| 29 | [0xb] = {SRIO1, SRIO1, SRIO1, SRIO1}, |
| 30 | [0xc] = {PCIE1, SRIO1, SGMII_TSEC1, SGMII_TSEC2}, |
| 31 | [0xf] = {PCIE1, PCIE1, PCIE1, PCIE1}, |
| 32 | }; |
| 33 | |
| 34 | int is_serdes_configured(enum srds_prtcl prtcl) |
| 35 | { |
Hou Zhiqiang | b435ae9 | 2016-08-02 19:03:22 +0800 | [diff] [blame] | 36 | if (!(serdes1_prtcl_map & (1 << NONE))) |
| 37 | fsl_serdes_init(); |
| 38 | |
Kumar Gala | 1c1fe93 | 2010-04-27 00:05:41 -0500 | [diff] [blame] | 39 | return (1 << prtcl) & serdes1_prtcl_map; |
| 40 | } |
| 41 | |
| 42 | void fsl_serdes_init(void) |
| 43 | { |
| 44 | ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); |
| 45 | u32 pordevsr = in_be32(&gur->pordevsr); |
| 46 | u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> |
| 47 | MPC85xx_PORDEVSR_IO_SEL_SHIFT; |
| 48 | int lane; |
| 49 | |
Hou Zhiqiang | b435ae9 | 2016-08-02 19:03:22 +0800 | [diff] [blame] | 50 | if (serdes1_prtcl_map & (1 << NONE)) |
| 51 | return; |
| 52 | |
Kumar Gala | 1c1fe93 | 2010-04-27 00:05:41 -0500 | [diff] [blame] | 53 | debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); |
| 54 | |
Axel Lin | ab95b09 | 2013-05-26 15:00:30 +0800 | [diff] [blame] | 55 | if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { |
Kumar Gala | 1c1fe93 | 2010-04-27 00:05:41 -0500 | [diff] [blame] | 56 | printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); |
| 57 | return; |
| 58 | } |
| 59 | |
| 60 | for (lane = 0; lane < SRDS1_MAX_LANES; lane++) { |
| 61 | enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; |
| 62 | serdes1_prtcl_map |= (1 << lane_prtcl); |
| 63 | } |
Hou Zhiqiang | b435ae9 | 2016-08-02 19:03:22 +0800 | [diff] [blame] | 64 | |
| 65 | /* Set the first bit to indicate serdes has been initialized */ |
| 66 | serdes1_prtcl_map |= (1 << NONE); |
Kumar Gala | 1c1fe93 | 2010-04-27 00:05:41 -0500 | [diff] [blame] | 67 | } |