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Stefan Roese05d10b52013-04-17 00:32:43 +00001/*
2 * Copyright (C) 2013 Stefan Roese <sr@denx.de>
3 *
4 * Configuration settings for the ProjectionDesign / Barco
5 * Titanium board.
6 *
7 * Based on mx6qsabrelite.h which is:
8 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
9 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +020010 * SPDX-License-Identifier: GPL-2.0+
Stefan Roese05d10b52013-04-17 00:32:43 +000011 */
12
13#ifndef __CONFIG_H
14#define __CONFIG_H
15
Eric Nelson062772c2013-11-26 17:40:30 -070016#include "mx6_common.h"
Stefan Roese05d10b52013-04-17 00:32:43 +000017
Stefan Roese05d10b52013-04-17 00:32:43 +000018#define CONFIG_MX6Q
Stefan Roese05d10b52013-04-17 00:32:43 +000019
Tom Rinic6e2db42017-01-25 20:42:38 -050020/* Provide the MACH_TYPE value that the vendor kernel requires. */
21#define CONFIG_MACH_TYPE 3769
Stefan Roese05d10b52013-04-17 00:32:43 +000022
Stefan Roese05d10b52013-04-17 00:32:43 +000023/* Size of malloc() pool */
24#define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024)
25
Stefan Roese05d10b52013-04-17 00:32:43 +000026#define CONFIG_MISC_INIT_R
Stefan Roese05d10b52013-04-17 00:32:43 +000027
28#define CONFIG_MXC_UART
29#define CONFIG_MXC_UART_BASE UART1_BASE
30
31/* I2C Configs */
trem03997412013-09-21 18:13:36 +020032#define CONFIG_SYS_I2C
33#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)eb943872015-09-21 22:43:38 +020034#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
35#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
York Sunf1a52162015-03-20 10:20:40 -070036#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
Stefan Roese05d10b52013-04-17 00:32:43 +000037#define CONFIG_SYS_I2C_SPEED 100000
38
39/* MMC Configs */
Stefan Roese05d10b52013-04-17 00:32:43 +000040#define CONFIG_SYS_FSL_ESDHC_ADDR 0
41#define CONFIG_SYS_FSL_USDHC_NUM 1
42
Stefan Roese05d10b52013-04-17 00:32:43 +000043#define CONFIG_FEC_MXC
44#define CONFIG_MII
45#define IMX_FEC_BASE ENET_BASE_ADDR
46#define CONFIG_FEC_XCV_TYPE RGMII
47#define CONFIG_FEC_MXC_PHYADDR 4
Stefan Roese05d10b52013-04-17 00:32:43 +000048
49/* USB Configs */
Stefan Roese05d10b52013-04-17 00:32:43 +000050#define CONFIG_MXC_USB_PORT 1
51#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
52#define CONFIG_MXC_USB_FLAGS 0
53
Stefan Roese05d10b52013-04-17 00:32:43 +000054#define CONFIG_SYS_MEMTEST_START 0x10000000
55#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (500 << 20))
56
57#define CONFIG_HOSTNAME titanium
58#define CONFIG_UBI_PART ubi
59#define CONFIG_UBIFS_VOLUME rootfs0
60
Stefan Roese05d10b52013-04-17 00:32:43 +000061#define CONFIG_EXTRA_ENV_SETTINGS \
62 "kernel=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \
63 "kernel_fs=/boot/uImage\0" \
64 "kernel_addr=11000000\0" \
65 "dtb=" __stringify(CONFIG_HOSTNAME) "/" \
66 __stringify(CONFIG_HOSTNAME) ".dtb\0" \
67 "dtb_fs=/boot/" __stringify(CONFIG_HOSTNAME) ".dtb\0" \
68 "dtb_addr=12800000\0" \
69 "script=boot.scr\0" \
70 "uimage=uImage\0" \
71 "console=ttymxc0\0" \
72 "baudrate=115200\0" \
73 "fdt_high=0xffffffff\0" \
74 "initrd_high=0xffffffff\0" \
75 "mmcdev=0\0" \
76 "mmcpart=1\0" \
77 "uimage=uImage\0" \
78 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}" \
79 " ${script}\0" \
80 "bootscript=echo Running bootscript from mmc ...; source\0" \
81 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
82 "mmcroot=/dev/mmcblk0p2\0" \
83 "mmcargs=setenv bootargs console=${console},${baudrate} " \
84 "root=${mmcroot} rootwait rw\0" \
85 "bootmmc=run mmcargs; fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}" \
86 " ${uimage}; bootm\0" \
87 "addip=setenv bootargs ${bootargs} " \
88 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
89 ":${hostname}:${netdev}:off panic=1\0" \
90 "addcon=setenv bootargs ${bootargs} console=ttymxc0," \
91 "${baudrate}\0" \
92 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
93 "rootpath=/opt/eldk-5.3/armv7a/rootfs-minimal-mtdutils\0" \
94 "nfsargs=setenv bootargs root=/dev/nfs rw " \
95 "nfsroot=${serverip}:${rootpath}\0" \
96 "ubifs=" __stringify(CONFIG_HOSTNAME) "/ubifs.img\0" \
97 "part=" __stringify(CONFIG_UBI_PART) "\0" \
98 "boot_vol=0\0" \
99 "vol=" __stringify(CONFIG_UBIFS_VOLUME) "\0" \
100 "load_ubifs=tftp ${kernel_addr} ${ubifs}\0" \
101 "update_ubifs=ubi part ${part};ubi write ${kernel_addr} ${vol}" \
102 " ${filesize}\0" \
103 "upd_ubifs=run load_ubifs update_ubifs\0" \
104 "init_ubi=nand erase.part ubi;ubi part ${part};" \
105 "ubi create ${vol} c800000\0" \
Tom Rini5ad8e112017-10-22 17:55:07 -0400106 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
107 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
Stefan Roese05d10b52013-04-17 00:32:43 +0000108 "nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip" \
109 " addcon addmtd;" \
110 "bootm ${kernel_addr} - ${dtb_addr}\0" \
111 "ubifsargs=set bootargs ubi.mtd=ubi " \
112 "root=ubi:rootfs${boot_vol} rootfstype=ubifs\0" \
113 "ubifs_mount=ubi part ubi;ubifsmount ubi:rootfs${boot_vol}\0" \
114 "ubifs_load=ubifsload ${kernel_addr} ${kernel_fs};" \
115 "ubifsload ${dtb_addr} ${dtb_fs};\0" \
116 "nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip addcon " \
117 "addmtd;bootm ${kernel_addr} - ${dtb_addr}\0" \
118 "load_kernel=tftp ${kernel_addr} ${kernel}\0" \
119 "load_dtb=tftp ${dtb_addr} ${dtb}\0" \
120 "net_nfs=run load_dtb load_kernel; " \
121 "run nfsargs addip addcon addmtd;" \
122 "bootm ${kernel_addr} - ${dtb_addr}\0" \
123 "delenv=env default -a -f; saveenv; reset\0"
124
125#define CONFIG_BOOTCOMMAND "run nand_ubifs"
126
Stefan Roese05d10b52013-04-17 00:32:43 +0000127/* Physical Memory Map */
128#define CONFIG_NR_DRAM_BANKS 1
129#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
130#define PHYS_SDRAM_SIZE (512 << 20)
131
132#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
133#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
134#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
135
136#define CONFIG_SYS_INIT_SP_OFFSET \
137 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
138#define CONFIG_SYS_INIT_SP_ADDR \
139 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
140
Stefan Roese05d10b52013-04-17 00:32:43 +0000141/* Enable NAND support */
Stefan Roese05d10b52013-04-17 00:32:43 +0000142#ifdef CONFIG_CMD_NAND
143
144/* NAND stuff */
145#define CONFIG_NAND_MXS
146#define CONFIG_SYS_MAX_NAND_DEVICE 1
147#define CONFIG_SYS_NAND_BASE 0x40000000
148#define CONFIG_SYS_NAND_5_ADDR_CYCLE
149#define CONFIG_SYS_NAND_ONFI_DETECTION
150
151/* DMA stuff, needed for GPMI/MXS NAND support */
152#define CONFIG_APBH_DMA
153#define CONFIG_APBH_DMA_BURST
154#define CONFIG_APBH_DMA_BURST8
155
156/* Environment in NAND */
Stefan Roese05d10b52013-04-17 00:32:43 +0000157#define CONFIG_ENV_OFFSET (16 << 20)
158#define CONFIG_ENV_SECT_SIZE (128 << 10)
159#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
160#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (512 << 10))
161#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
162
163#else /* CONFIG_CMD_NAND */
164
165/* Environment in MMC */
166#define CONFIG_ENV_SIZE (8 << 10)
Stefan Roese05d10b52013-04-17 00:32:43 +0000167#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
168#define CONFIG_SYS_MMC_ENV_DEV 0
169
170#endif /* CONFIG_CMD_NAND */
171
172/* UBI/UBIFS config options */
Stefan Roese05d10b52013-04-17 00:32:43 +0000173#define CONFIG_MTD_DEVICE
174#define CONFIG_MTD_PARTITIONS
Stefan Roese05d10b52013-04-17 00:32:43 +0000175
Stefan Roese05d10b52013-04-17 00:32:43 +0000176#endif /* __CONFIG_H */