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Simon Glassec3be542015-08-30 16:55:41 -06001/*
2 * (C) Copyright 2015 Google, Inc
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#ifndef __CONFIG_RK3288_COMMON_H
8#define __CONFIG_RK3288_COMMON_H
9
10#include <asm/arch/hardware.h>
Jacob Chen63dc9712016-10-08 13:47:41 +080011#include "rockchip-common.h"
Simon Glassec3be542015-08-30 16:55:41 -060012
Xu Ziyuan68728e82016-08-27 21:53:14 +080013#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
Simon Glassec3be542015-08-30 16:55:41 -060014#define CONFIG_NR_DRAM_BANKS 1
Simon Glassec3be542015-08-30 16:55:41 -060015#define CONFIG_SYS_MALLOC_LEN (32 << 20)
16#define CONFIG_SYS_CBSIZE 1024
Simon Glassec3be542015-08-30 16:55:41 -060017
18#define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000)
huang lin8db3e242015-11-17 14:20:09 +080019#define CONFIG_SYS_TIMER_BASE 0xff810020 /* TIMER7 */
20#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
Simon Glassec3be542015-08-30 16:55:41 -060021
22#define CONFIG_SPL_FRAMEWORK
Simon Glassec3be542015-08-30 16:55:41 -060023#define CONFIG_SYS_NS16550_MEM32
Simon Glassec3be542015-08-30 16:55:41 -060024
Philipp Tomsich798370f2017-06-29 11:21:15 +020025#ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
Xu Ziyuan5401eb82016-07-12 19:09:49 +080026/* Bootrom will load u-boot binary to 0x0 once return from SPL */
27#define CONFIG_SYS_TEXT_BASE 0x00000000
28#else
Simon Glassec3be542015-08-30 16:55:41 -060029#define CONFIG_SYS_TEXT_BASE 0x00100000
Xu Ziyuan5401eb82016-07-12 19:09:49 +080030#endif
Simon Glassec3be542015-08-30 16:55:41 -060031#define CONFIG_SYS_INIT_SP_ADDR 0x00100000
32#define CONFIG_SYS_LOAD_ADDR 0x00800800
33#define CONFIG_SPL_STACK 0xff718000
Jagan Teki387fd4b2017-09-27 23:03:12 +053034#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_TPL_BOOTROM_SUPPORT)
35# define CONFIG_SPL_TEXT_BASE 0x0
36#else
Kever Yang5f651fd2017-10-10 16:21:05 +020037# define CONFIG_SPL_TEXT_BASE 0xff704000
Jagan Teki387fd4b2017-09-27 23:03:12 +053038#endif
Simon Glassec3be542015-08-30 16:55:41 -060039
40/* MMC/SD IP block */
Simon Glassec3be542015-08-30 16:55:41 -060041#define CONFIG_BOUNCE_BUFFER
42
Simon Glassec3be542015-08-30 16:55:41 -060043/* RAW SD card / eMMC locations. */
Simon Glassec3be542015-08-30 16:55:41 -060044#define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
45
46/* FAT sd card locations. */
47#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
48#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
49
Simon Glassec3be542015-08-30 16:55:41 -060050#define CONFIG_SYS_SDRAM_BASE 0
51#define CONFIG_NR_DRAM_BANKS 1
52#define SDRAM_BANK_SIZE (2UL << 30)
Kever Yang5db9e672017-06-23 16:11:05 +080053#define SDRAM_MAX_SIZE 0xfe000000
Simon Glassec3be542015-08-30 16:55:41 -060054
55#define CONFIG_SPI_FLASH
56#define CONFIG_SPI
Simon Glassec3be542015-08-30 16:55:41 -060057#define CONFIG_SF_DEFAULT_SPEED 20000000
58
jk.kernel@gmail.com376bcc62016-07-26 18:28:24 +080059#ifndef CONFIG_SPL_BUILD
Xu Ziyuana11a53f2016-07-15 00:26:59 +080060/* usb otg */
Xu Ziyuana11a53f2016-07-15 00:26:59 +080061
Xu Ziyuanb653b472016-08-03 11:55:06 +080062/* usb mass storage */
Xu Ziyuanb653b472016-08-03 11:55:06 +080063#define CONFIG_CMD_USB_MASS_STORAGE
64
Kever Yangf7d6def2016-11-24 15:29:51 +080065/* usb host support */
Sjoerd Simons427418b2015-08-30 16:55:48 -060066#define ENV_MEM_LAYOUT_SETTINGS \
67 "scriptaddr=0x00000000\0" \
68 "pxefile_addr_r=0x00100000\0" \
69 "fdt_addr_r=0x01f00000\0" \
70 "kernel_addr_r=0x02000000\0" \
71 "ramdisk_addr_r=0x04000000\0"
72
Sjoerd Simons427418b2015-08-30 16:55:48 -060073#include <config_distro_bootcmd.h>
74
Sandy Pattersonf4526ef2016-07-11 13:38:52 -040075/* Linux fails to load the fdt if it's loaded above 256M on a Rock 2 board, so
Sjoerd Simons427418b2015-08-30 16:55:48 -060076 * limit the fdt reallocation to that */
77#define CONFIG_EXTRA_ENV_SETTINGS \
Sandy Pattersonf4526ef2016-07-11 13:38:52 -040078 "fdt_high=0x0fffffff\0" \
79 "initrd_high=0x0fffffff\0" \
Xu Ziyuan05c3ca62016-08-03 11:55:05 +080080 "partitions=" PARTS_DEFAULT \
Sjoerd Simons427418b2015-08-30 16:55:48 -060081 ENV_MEM_LAYOUT_SETTINGS \
Simon Glasscf88b7c2016-01-21 19:44:13 -070082 ROCKCHIP_DEVICE_SETTINGS \
Sjoerd Simons427418b2015-08-30 16:55:48 -060083 BOOTENV
Simon Glassec3be542015-08-30 16:55:41 -060084#endif
85
Jacob Chenc95f3782016-09-19 18:46:28 +080086#define CONFIG_PREBOOT
87
Simon Glassec3be542015-08-30 16:55:41 -060088#endif