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Jaehoon Chungb0b0c9d2012-04-23 02:36:28 +00001/*
2 * (C) Copyright 2012 SAMSUNG Electronics
3 * Jaehoon Chung <jh80.chung@samsung.com>
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Jaehoon Chungb0b0c9d2012-04-23 02:36:28 +00006 */
7
8#include <common.h>
Jaehoon Chung990a9372016-09-09 18:23:23 +09009#include <dm.h>
Jaehoon Chungb0b0c9d2012-04-23 02:36:28 +000010#include <malloc.h>
11#include <sdhci.h>
Piotr Wilczek12cf19e2014-03-07 14:59:41 +010012#include <fdtdec.h>
13#include <libfdt.h>
14#include <asm/gpio.h>
Jaehoon Chungb0b0c9d2012-04-23 02:36:28 +000015#include <asm/arch/mmc.h>
Jaehoon Chungb1929ea2012-08-30 16:24:11 +000016#include <asm/arch/clk.h>
Piotr Wilczek12cf19e2014-03-07 14:59:41 +010017#include <errno.h>
Piotr Wilczek12cf19e2014-03-07 14:59:41 +010018#include <asm/arch/pinmux.h>
Jaehoon Chungb0b0c9d2012-04-23 02:36:28 +000019
Jaehoon Chung990a9372016-09-09 18:23:23 +090020#ifdef CONFIG_DM_MMC
21struct s5p_sdhci_plat {
22 struct mmc_config cfg;
23 struct mmc mmc;
24};
25
26DECLARE_GLOBAL_DATA_PTR;
27#endif
28
Jaehoon Chungb0b0c9d2012-04-23 02:36:28 +000029static char *S5P_NAME = "SAMSUNG SDHCI";
30static void s5p_sdhci_set_control_reg(struct sdhci_host *host)
31{
32 unsigned long val, ctrl;
33 /*
34 * SELCLKPADDS[17:16]
35 * 00 = 2mA
36 * 01 = 4mA
37 * 10 = 7mA
38 * 11 = 9mA
39 */
40 sdhci_writel(host, SDHCI_CTRL4_DRIVE_MASK(0x3), SDHCI_CONTROL4);
41
42 val = sdhci_readl(host, SDHCI_CONTROL2);
Matt Reimer9af8f392015-02-23 14:52:22 -070043 val &= SDHCI_CTRL2_SELBASECLK_MASK(3);
Jaehoon Chungb0b0c9d2012-04-23 02:36:28 +000044
45 val |= SDHCI_CTRL2_ENSTAASYNCCLR |
46 SDHCI_CTRL2_ENCMDCNFMSK |
47 SDHCI_CTRL2_ENFBCLKRX |
48 SDHCI_CTRL2_ENCLKOUTHOLD;
49
50 sdhci_writel(host, val, SDHCI_CONTROL2);
51
52 /*
53 * FCSEL3[31] FCSEL2[23] FCSEL1[15] FCSEL0[7]
54 * FCSel[1:0] : Rx Feedback Clock Delay Control
55 * Inverter delay means10ns delay if SDCLK 50MHz setting
56 * 01 = Delay1 (basic delay)
57 * 11 = Delay2 (basic delay + 2ns)
58 * 00 = Delay3 (inverter delay)
59 * 10 = Delay4 (inverter delay + 2ns)
60 */
Jaehoon Chungb36cbac2012-08-30 16:24:08 +000061 val = SDHCI_CTRL3_FCSEL0 | SDHCI_CTRL3_FCSEL1;
Jaehoon Chungb0b0c9d2012-04-23 02:36:28 +000062 sdhci_writel(host, val, SDHCI_CONTROL3);
63
64 /*
65 * SELBASECLK[5:4]
66 * 00/01 = HCLK
67 * 10 = EPLL
68 * 11 = XTI or XEXTCLK
69 */
70 ctrl = sdhci_readl(host, SDHCI_CONTROL2);
71 ctrl &= ~SDHCI_CTRL2_SELBASECLK_MASK(0x3);
72 ctrl |= SDHCI_CTRL2_SELBASECLK_MASK(0x2);
73 sdhci_writel(host, ctrl, SDHCI_CONTROL2);
74}
75
Jaehoon Chungb494ac82014-05-16 13:59:59 +090076static int s5p_sdhci_core_init(struct sdhci_host *host)
Jaehoon Chungb0b0c9d2012-04-23 02:36:28 +000077{
Jaehoon Chungb0b0c9d2012-04-23 02:36:28 +000078 host->name = S5P_NAME;
Jaehoon Chungb0b0c9d2012-04-23 02:36:28 +000079
Jaehoon Chungb36cbac2012-08-30 16:24:08 +000080 host->quirks = SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE |
Jaehoon Chunga2f94cd2016-07-12 21:18:47 +090081 SDHCI_QUIRK_32BIT_DMA_ADDR |
Jaehoon Chung46e627c2013-07-19 17:44:49 +090082 SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_USE_WIDE8;
Jaehoon Chungb0b0c9d2012-04-23 02:36:28 +000083 host->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
Jaehoon Chungb0b0c9d2012-04-23 02:36:28 +000084
85 host->set_control_reg = &s5p_sdhci_set_control_reg;
Jaehoon Chungb1929ea2012-08-30 16:24:11 +000086 host->set_clock = set_mmc_clk;
Jaehoon Chungb0b0c9d2012-04-23 02:36:28 +000087
Jaehoon Chungb494ac82014-05-16 13:59:59 +090088 if (host->bus_width == 8)
Jaehoon Chung46e627c2013-07-19 17:44:49 +090089 host->host_caps |= MMC_MODE_8BIT;
Jaehoon Chungb0b0c9d2012-04-23 02:36:28 +000090
Jaehoon Chung990a9372016-09-09 18:23:23 +090091#ifndef CONFIG_BLK
Jaehoon Chung0c3c2552012-12-13 20:07:12 +000092 return add_sdhci(host, 52000000, 400000);
Jaehoon Chung990a9372016-09-09 18:23:23 +090093#else
94 return 0;
95#endif
Jaehoon Chungb0b0c9d2012-04-23 02:36:28 +000096}
Piotr Wilczek12cf19e2014-03-07 14:59:41 +010097
Jaehoon Chungb494ac82014-05-16 13:59:59 +090098int s5p_sdhci_init(u32 regbase, int index, int bus_width)
99{
Tobias Jakobi49b330d2015-10-05 13:47:50 +0200100 struct sdhci_host *host = calloc(1, sizeof(struct sdhci_host));
Jaehoon Chungb494ac82014-05-16 13:59:59 +0900101 if (!host) {
Tobias Jakobi49b330d2015-10-05 13:47:50 +0200102 printf("sdhci__host allocation fail!\n");
Jaehoon Chungfc6c1c62016-09-26 08:10:02 +0900103 return -ENOMEM;
Jaehoon Chungb494ac82014-05-16 13:59:59 +0900104 }
105 host->ioaddr = (void *)regbase;
106 host->index = index;
107 host->bus_width = bus_width;
108
109 return s5p_sdhci_core_init(host);
110}
111
Masahiro Yamada366b24f2015-08-12 07:31:55 +0900112#if CONFIG_IS_ENABLED(OF_CONTROL)
Piotr Wilczek12cf19e2014-03-07 14:59:41 +0100113struct sdhci_host sdhci_host[SDHCI_MAX_HOSTS];
114
115static int do_sdhci_init(struct sdhci_host *host)
116{
Tobias Jakobic29121b2015-10-05 13:47:53 +0200117 int dev_id, flag, ret;
Piotr Wilczek12cf19e2014-03-07 14:59:41 +0100118
119 flag = host->bus_width == 8 ? PINMUX_FLAG_8BIT_MODE : PINMUX_FLAG_NONE;
120 dev_id = host->index + PERIPH_ID_SDMMC0;
121
Przemyslaw Marczak44468ef2015-10-28 15:41:50 +0100122 ret = exynos_pinmux_config(dev_id, flag);
123 if (ret) {
124 printf("external SD not configured\n");
125 return ret;
126 }
127
Simon Glassa30d4ba2015-01-05 20:05:38 -0700128 if (dm_gpio_is_valid(&host->pwr_gpio)) {
129 dm_gpio_set_value(&host->pwr_gpio, 1);
Tobias Jakobic29121b2015-10-05 13:47:53 +0200130 ret = exynos_pinmux_config(dev_id, flag);
131 if (ret) {
Piotr Wilczek12cf19e2014-03-07 14:59:41 +0100132 debug("MMC not configured\n");
Tobias Jakobic29121b2015-10-05 13:47:53 +0200133 return ret;
Piotr Wilczek12cf19e2014-03-07 14:59:41 +0100134 }
135 }
136
Simon Glassa30d4ba2015-01-05 20:05:38 -0700137 if (dm_gpio_is_valid(&host->cd_gpio)) {
Tobias Jakobic29121b2015-10-05 13:47:53 +0200138 ret = dm_gpio_get_value(&host->cd_gpio);
139 if (ret) {
140 debug("no SD card detected (%d)\n", ret);
Piotr Wilczek12cf19e2014-03-07 14:59:41 +0100141 return -ENODEV;
Tobias Jakobic29121b2015-10-05 13:47:53 +0200142 }
Piotr Wilczek12cf19e2014-03-07 14:59:41 +0100143 }
144
Jaehoon Chungb494ac82014-05-16 13:59:59 +0900145 return s5p_sdhci_core_init(host);
Piotr Wilczek12cf19e2014-03-07 14:59:41 +0100146}
147
148static int sdhci_get_config(const void *blob, int node, struct sdhci_host *host)
149{
150 int bus_width, dev_id;
151 unsigned int base;
152
153 /* Get device id */
154 dev_id = pinmux_decode_periph_id(blob, node);
155 if (dev_id < PERIPH_ID_SDMMC0 && dev_id > PERIPH_ID_SDMMC3) {
156 debug("MMC: Can't get device id\n");
Jaehoon Chungfc6c1c62016-09-26 08:10:02 +0900157 return -EINVAL;
Piotr Wilczek12cf19e2014-03-07 14:59:41 +0100158 }
159 host->index = dev_id - PERIPH_ID_SDMMC0;
160
161 /* Get bus width */
162 bus_width = fdtdec_get_int(blob, node, "samsung,bus-width", 0);
163 if (bus_width <= 0) {
164 debug("MMC: Can't get bus-width\n");
Jaehoon Chungfc6c1c62016-09-26 08:10:02 +0900165 return -EINVAL;
Piotr Wilczek12cf19e2014-03-07 14:59:41 +0100166 }
167 host->bus_width = bus_width;
168
169 /* Get the base address from the device node */
170 base = fdtdec_get_addr(blob, node, "reg");
171 if (!base) {
172 debug("MMC: Can't get base address\n");
Jaehoon Chungfc6c1c62016-09-26 08:10:02 +0900173 return -EINVAL;
Piotr Wilczek12cf19e2014-03-07 14:59:41 +0100174 }
175 host->ioaddr = (void *)base;
176
Simon Glassa30d4ba2015-01-05 20:05:38 -0700177 gpio_request_by_name_nodev(blob, node, "pwr-gpios", 0, &host->pwr_gpio,
178 GPIOD_IS_OUT);
179 gpio_request_by_name_nodev(blob, node, "cd-gpios", 0, &host->cd_gpio,
180 GPIOD_IS_IN);
Piotr Wilczek12cf19e2014-03-07 14:59:41 +0100181
182 return 0;
183}
184
185static int process_nodes(const void *blob, int node_list[], int count)
186{
187 struct sdhci_host *host;
Tobias Jakobi953d21b2015-10-05 13:47:52 +0200188 int i, node, ret;
Tobias Jakobi0ab570c2015-10-05 13:47:51 +0200189 int failed = 0;
Piotr Wilczek12cf19e2014-03-07 14:59:41 +0100190
191 debug("%s: count = %d\n", __func__, count);
192
193 /* build sdhci_host[] for each controller */
194 for (i = 0; i < count; i++) {
195 node = node_list[i];
196 if (node <= 0)
197 continue;
198
199 host = &sdhci_host[i];
200
Tobias Jakobi953d21b2015-10-05 13:47:52 +0200201 ret = sdhci_get_config(blob, node, host);
202 if (ret) {
203 printf("%s: failed to decode dev %d (%d)\n", __func__, i, ret);
Tobias Jakobi0ab570c2015-10-05 13:47:51 +0200204 failed++;
205 continue;
206 }
207
Tobias Jakobi953d21b2015-10-05 13:47:52 +0200208 ret = do_sdhci_init(host);
Przemyslaw Marczak44468ef2015-10-28 15:41:50 +0100209 if (ret && ret != -ENODEV) {
Tobias Jakobi953d21b2015-10-05 13:47:52 +0200210 printf("%s: failed to initialize dev %d (%d)\n", __func__, i, ret);
Tobias Jakobi0ab570c2015-10-05 13:47:51 +0200211 failed++;
Piotr Wilczek12cf19e2014-03-07 14:59:41 +0100212 }
Piotr Wilczek12cf19e2014-03-07 14:59:41 +0100213 }
Tobias Jakobi0ab570c2015-10-05 13:47:51 +0200214
215 /* we only consider it an error when all nodes fail */
216 return (failed == count ? -1 : 0);
Piotr Wilczek12cf19e2014-03-07 14:59:41 +0100217}
218
219int exynos_mmc_init(const void *blob)
220{
221 int count;
222 int node_list[SDHCI_MAX_HOSTS];
223
224 count = fdtdec_find_aliases_for_id(blob, "mmc",
225 COMPAT_SAMSUNG_EXYNOS_MMC, node_list,
226 SDHCI_MAX_HOSTS);
227
Tobias Jakobi0ab570c2015-10-05 13:47:51 +0200228 return process_nodes(blob, node_list, count);
Piotr Wilczek12cf19e2014-03-07 14:59:41 +0100229}
230#endif
Jaehoon Chung990a9372016-09-09 18:23:23 +0900231
232#ifdef CONFIG_DM_MMC
233static int s5p_sdhci_probe(struct udevice *dev)
234{
235 struct s5p_sdhci_plat *plat = dev_get_platdata(dev);
236 struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
237 struct sdhci_host *host = dev_get_priv(dev);
238 int ret;
239
240 ret = sdhci_get_config(gd->fdt_blob, dev->of_offset, host);
241 if (ret)
242 return ret;
243
244 ret = do_sdhci_init(host);
245 if (ret)
246 return ret;
247
248 ret = sdhci_setup_cfg(&plat->cfg, host, 52000000, 400000);
249 if (ret)
250 return ret;
251
252 host->mmc = &plat->mmc;
253 host->mmc->priv = host;
254 host->mmc->dev = dev;
255 upriv->mmc = host->mmc;
256
257 return sdhci_probe(dev);
258}
259
260static int s5p_sdhci_bind(struct udevice *dev)
261{
262 struct s5p_sdhci_plat *plat = dev_get_platdata(dev);
263 int ret;
264
265 ret = sdhci_bind(dev, &plat->mmc, &plat->cfg);
266 if (ret)
267 return ret;
268
269 return 0;
270}
271
272static const struct udevice_id s5p_sdhci_ids[] = {
273 { .compatible = "samsung,exynos4412-sdhci"},
274 { }
275};
276
277U_BOOT_DRIVER(s5p_sdhci_drv) = {
278 .name = "s5p_sdhci",
279 .id = UCLASS_MMC,
280 .of_match = s5p_sdhci_ids,
281 .bind = s5p_sdhci_bind,
282 .ops = &sdhci_ops,
283 .probe = s5p_sdhci_probe,
284 .priv_auto_alloc_size = sizeof(struct sdhci_host),
285 .platdata_auto_alloc_size = sizeof(struct s5p_sdhci_plat),
286};
287#endif /* CONFIG_DM_MMC */