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git01.mediatek.com / filogic / uboot / 70548103154d8b161bcc100a974188047715255c / . / arch / arm / cpu / armv7 / Kconfig
blob: 60bb0a9e1ec47654a8e71dcb12232c99c2367935 [file] [log] [blame]
Lokesh Vutla81b1a672018-04-26 18:21:26 +0530[diff] [blame]1if CPU_V7A
Hans de Goede85437352014-11-14 09:34:30 +0100[diff] [blame]2
3config CPU_V7_HAS_NONSEC
4 bool
5
6config CPU_V7_HAS_VIRT
7 bool
8
Masahiro Yamadad5415b22016-08-30 16:22:22 +0900[diff] [blame]9config ARCH_SUPPORT_PSCI
10 bool
11
Hans de Goede85437352014-11-14 09:34:30 +0100[diff] [blame]12config ARMV7_NONSEC
Masahiro Yamada78cd22a2016-08-12 10:26:50 +0900[diff] [blame]13 bool "Enable support for booting in non-secure mode" if EXPERT
Hans de Goede85437352014-11-14 09:34:30 +0100[diff] [blame]14 depends on CPU_V7_HAS_NONSEC
15 default y
16 ---help---
17 Say Y here to enable support for booting in non-secure / SVC mode.
18
Hans de Goede63fb5482014-11-14 09:34:31 +0100[diff] [blame]19config ARMV7_BOOT_SEC_DEFAULT
Masahiro Yamada78cd22a2016-08-12 10:26:50 +0900[diff] [blame]20 bool "Boot in secure mode by default" if EXPERT
Hans de Goede63fb5482014-11-14 09:34:31 +0100[diff] [blame]21 depends on ARMV7_NONSEC
Trevor Woerner513f6402020-05-06 08:02:41 -0400[diff] [blame]22 default y if ARCH_TEGRA
Hans de Goede63fb5482014-11-14 09:34:31 +0100[diff] [blame]23 ---help---
24 Say Y here to boot in secure mode by default even if non-secure mode
25 is supported. This option is useful to boot kernels which do not
26 suppport booting in non-secure mode. Only set this if you need it.
Robert P. J. Day8d56db92016-07-15 13:44:45 -0400[diff] [blame]27 This can be overridden at run-time by setting the bootm_boot_mode env.
Hans de Goede63fb5482014-11-14 09:34:31 +0100[diff] [blame]28 variable to "sec" or "nonsec".
29
Hans de Goede85437352014-11-14 09:34:30 +0100[diff] [blame]30config ARMV7_VIRT
Masahiro Yamada78cd22a2016-08-12 10:26:50 +0900[diff] [blame]31 bool "Enable support for hardware virtualization" if EXPERT
Hans de Goede85437352014-11-14 09:34:30 +0100[diff] [blame]32 depends on CPU_V7_HAS_VIRT && ARMV7_NONSEC
33 default y
34 ---help---
35 Say Y here to boot in hypervisor (HYP) mode when booting non-secure.
36
Masahiro Yamadad5415b22016-08-30 16:22:22 +0900[diff] [blame]37config ARMV7_PSCI
38 bool "Enable PSCI support" if EXPERT
39 depends on ARMV7_NONSEC && ARCH_SUPPORT_PSCI
40 default y
41 help
42 Say Y here to enable PSCI support.
43
Patrick Delaunayf8a4df82020-06-17 18:19:18 +0200[diff] [blame]44choice
45 prompt "Supported PSCI version"
46 depends on ARMV7_PSCI
Icenowy Zheng70548102020-08-01 02:56:45 +0800[diff] [blame^]47 default ARMV7_PSCI_0_1 if ARCH_SUNXI
Patrick Delaunayf8a4df82020-06-17 18:19:18 +0200[diff] [blame]48 default ARMV7_PSCI_1_0
49 help
50 Select the supported PSCI version.
51
52config ARMV7_PSCI_1_0
53 bool "PSCI V1.0"
54
55config ARMV7_PSCI_0_2
56 bool "PSCI V0.2"
Icenowy Zheng70548102020-08-01 02:56:45 +0800[diff] [blame^]57
58config ARMV7_PSCI_0_1
59 bool "PSCI V0.1"
Patrick Delaunayf8a4df82020-06-17 18:19:18 +0200[diff] [blame]60endchoice
61
Masahiro Yamada6abecc32016-08-30 16:22:23 +0900[diff] [blame]62config ARMV7_PSCI_NR_CPUS
63 int "Maximum supported CPUs for PSCI"
64 depends on ARMV7_NONSEC
65 default 4
66 help
67 The maximum number of CPUs supported in the PSCI firmware.
68 It is no problem to set a larger value than the number of
69 CPUs in the actual hardware implementation.
70
Alexander Grafae6c2bc2016-03-16 15:41:21 +0100[diff] [blame]71config ARMV7_LPAE
Masahiro Yamada78cd22a2016-08-12 10:26:50 +0900[diff] [blame]72 bool "Use LPAE page table format" if EXPERT
Lokesh Vutla81b1a672018-04-26 18:21:26 +0530[diff] [blame]73 depends on CPU_V7A
Mark Kettenis0a7a0742018-06-15 23:47:14 +0200[diff] [blame]74 default y if ARMV7_VIRT
Alexander Grafae6c2bc2016-03-16 15:41:21 +0100[diff] [blame]75 ---help---
76 Say Y here to use the long descriptor page table format. This is
77 required if U-Boot runs in HYP mode.
78
Hans de Goede85437352014-11-14 09:34:30 +0100[diff] [blame]79endif