Stefan Roese | 09e9076 | 2021-04-07 09:12:31 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright (C) 2019 Marvell International Ltd. |
| 4 | * Copyright (C) 2021 Stefan Roese <sr@denx.de> |
| 5 | */ |
| 6 | |
| 7 | #include <dm.h> |
| 8 | #include <dm/uclass.h> |
| 9 | #include <errno.h> |
| 10 | #include <input.h> |
| 11 | #include <iomux.h> |
| 12 | #include <log.h> |
| 13 | #include <serial.h> |
| 14 | #include <stdio_dev.h> |
| 15 | #include <string.h> |
| 16 | #include <watchdog.h> |
| 17 | #include <linux/delay.h> |
| 18 | #include <asm/addrspace.h> |
| 19 | #include <asm/io.h> |
| 20 | #include <mach/cvmx-regs.h> |
| 21 | #include <mach/cvmx-bootmem.h> |
| 22 | |
| 23 | #define DRIVER_NAME "pci-bootcmd" |
| 24 | |
| 25 | /* |
| 26 | * Important: |
| 27 | * This address cannot be changed as the PCI console tool relies on exactly |
| 28 | * this value! |
| 29 | */ |
| 30 | #define BOOTLOADER_PCI_READ_BUFFER_BASE 0x6c000 |
| 31 | #define BOOTLOADER_PCI_READ_BUFFER_SIZE 256 |
| 32 | #define BOOTLOADER_PCI_WRITE_BUFFER_SIZE 256 |
| 33 | |
| 34 | #define BOOTLOADER_PCI_READ_BUFFER_STR_LEN \ |
| 35 | (BOOTLOADER_PCI_READ_BUFFER_SIZE - 8) |
| 36 | #define BOOTLOADER_PCI_WRITE_BUFFER_STR_LEN \ |
| 37 | (BOOTLOADER_PCI_WRITE_BUFFER_SIZE - 8) |
| 38 | |
| 39 | #define BOOTLOADER_PCI_READ_BUFFER_OWNER_ADDR \ |
| 40 | (BOOTLOADER_PCI_READ_BUFFER_BASE + 0) |
| 41 | #define BOOTLOADER_PCI_READ_BUFFER_LEN_ADDR \ |
| 42 | (BOOTLOADER_PCI_READ_BUFFER_BASE + 4) |
| 43 | #define BOOTLOADER_PCI_READ_BUFFER_DATA_ADDR \ |
| 44 | (BOOTLOADER_PCI_READ_BUFFER_BASE + 8) |
| 45 | |
| 46 | enum octeon_pci_io_buf_owner { |
| 47 | /* Must be zero, set when memory cleared */ |
| 48 | OCTEON_PCI_IO_BUF_OWNER_INVALID = 0, |
| 49 | OCTEON_PCI_IO_BUF_OWNER_OCTEON = 1, |
| 50 | OCTEON_PCI_IO_BUF_OWNER_HOST = 2, |
| 51 | }; |
| 52 | |
| 53 | /* Structure for bootloader PCI IO buffers */ |
| 54 | struct octeon_pci_io_buf { |
| 55 | u32 owner; |
| 56 | u32 len; |
| 57 | char data[0]; |
| 58 | }; |
| 59 | |
| 60 | struct octeon_bootcmd_priv { |
| 61 | bool started; |
| 62 | int copy_offset; |
| 63 | bool eol; |
| 64 | bool unlocked; |
| 65 | struct octeon_pci_io_buf *buf; |
| 66 | }; |
| 67 | |
| 68 | static int octeon_bootcmd_pending(struct udevice *dev, bool input) |
| 69 | { |
| 70 | struct octeon_bootcmd_priv *priv = dev_get_priv(dev); |
| 71 | |
| 72 | if (!input) |
| 73 | return 0; |
| 74 | |
| 75 | if (priv->eol) |
| 76 | return 1; |
| 77 | |
| 78 | CVMX_SYNC; |
| 79 | if (priv->buf->owner != OCTEON_PCI_IO_BUF_OWNER_OCTEON) |
| 80 | return 0; |
| 81 | |
| 82 | if (priv->buf->len > priv->copy_offset && |
| 83 | (priv->buf->data[priv->copy_offset] != '\0')) |
| 84 | return 1; |
| 85 | |
| 86 | return 0; |
| 87 | } |
| 88 | |
| 89 | static int octeon_bootcmd_getc(struct udevice *dev) |
| 90 | { |
| 91 | struct octeon_bootcmd_priv *priv = dev_get_priv(dev); |
| 92 | char c; |
| 93 | |
| 94 | /* There's no EOL for boot commands so we fake it. */ |
| 95 | if (priv->eol) { |
| 96 | priv->eol = false; |
| 97 | return '\n'; |
| 98 | } |
| 99 | |
| 100 | while (!octeon_bootcmd_pending(dev, true)) { |
| 101 | WATCHDOG_RESET(); |
| 102 | /* |
| 103 | * ToDo: |
| 104 | * The original code calls octeon_board_poll() here. We may |
| 105 | * need to implement something similar here. |
| 106 | */ |
| 107 | udelay(100); |
| 108 | } |
| 109 | |
| 110 | c = priv->buf->data[priv->copy_offset]; |
| 111 | priv->buf->data[priv->copy_offset++] = '\0'; |
| 112 | |
| 113 | if (priv->copy_offset >= min_t(int, CONFIG_SYS_CBSIZE - 1, |
| 114 | BOOTLOADER_PCI_READ_BUFFER_STR_LEN - 1) || |
| 115 | (priv->buf->data[priv->copy_offset] == '\0')) { |
| 116 | priv->copy_offset = 0; |
| 117 | priv->buf->len = 0; |
| 118 | priv->buf->owner = OCTEON_PCI_IO_BUF_OWNER_HOST; |
| 119 | priv->eol = true; |
| 120 | CVMX_SYNC; |
| 121 | } |
| 122 | |
| 123 | return c; |
| 124 | } |
| 125 | |
| 126 | static const struct dm_serial_ops octeon_bootcmd_ops = { |
| 127 | .getc = octeon_bootcmd_getc, |
| 128 | .pending = octeon_bootcmd_pending, |
| 129 | }; |
| 130 | |
| 131 | static int octeon_bootcmd_probe(struct udevice *dev) |
| 132 | { |
| 133 | struct octeon_bootcmd_priv *priv = dev_get_priv(dev); |
| 134 | |
| 135 | priv->buf = (void *)CKSEG0ADDR(BOOTLOADER_PCI_READ_BUFFER_BASE); |
| 136 | memset(priv->buf, 0, BOOTLOADER_PCI_READ_BUFFER_SIZE); |
| 137 | priv->eol = false; |
| 138 | |
| 139 | /* |
| 140 | * When the bootcmd console is first started it is started as locked to |
| 141 | * block any calls sending a command until U-Boot is ready to accept |
| 142 | * commands. Just before the main loop starts to accept commands the |
| 143 | * bootcmd console is unlocked. |
| 144 | */ |
| 145 | if (priv->unlocked) |
| 146 | priv->buf->owner = OCTEON_PCI_IO_BUF_OWNER_HOST; |
| 147 | else |
| 148 | priv->buf->owner = OCTEON_PCI_IO_BUF_OWNER_OCTEON; |
| 149 | |
| 150 | debug("%s called, buffer ptr: 0x%p, owner: %s\n", __func__, |
| 151 | priv->buf, |
| 152 | priv->buf->owner == OCTEON_PCI_IO_BUF_OWNER_HOST ? |
| 153 | "host" : "octeon"); |
| 154 | debug("&priv->copy_offset: 0x%p\n", &priv->copy_offset); |
| 155 | CVMX_SYNC; |
| 156 | |
| 157 | /* |
| 158 | * Perhaps reinvestige this: In the original code, "unlocked" etc |
| 159 | * is set in the octeon_pci_bootcmd_unlock() function called very |
| 160 | * late. |
| 161 | */ |
| 162 | priv->buf->owner = OCTEON_PCI_IO_BUF_OWNER_HOST; |
| 163 | priv->unlocked = true; |
| 164 | priv->started = true; |
| 165 | CVMX_SYNC; |
| 166 | |
| 167 | return 0; |
| 168 | } |
| 169 | |
| 170 | static const struct udevice_id octeon_bootcmd_serial_id[] = { |
| 171 | { .compatible = "marvell,pci-bootcmd", }, |
| 172 | { }, |
| 173 | }; |
| 174 | |
| 175 | U_BOOT_DRIVER(octeon_bootcmd) = { |
| 176 | .name = DRIVER_NAME, |
| 177 | .id = UCLASS_SERIAL, |
| 178 | .ops = &octeon_bootcmd_ops, |
| 179 | .of_match = of_match_ptr(octeon_bootcmd_serial_id), |
| 180 | .probe = octeon_bootcmd_probe, |
| 181 | .priv_auto = sizeof(struct octeon_bootcmd_priv), |
| 182 | }; |