Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/timer/renesas,tmu.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Renesas R-Mobile/R-Car Timer Unit (TMU) |
| 8 | |
| 9 | maintainers: |
| 10 | - Geert Uytterhoeven <geert+renesas@glider.be> |
| 11 | - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> |
| 12 | |
| 13 | description: |
| 14 | The TMU is a 32-bit timer/counter with configurable clock inputs and |
| 15 | programmable compare match. |
| 16 | |
| 17 | Channels share hardware resources but their counter and compare match value |
| 18 | are independent. The TMU hardware supports up to three channels. |
| 19 | |
| 20 | properties: |
| 21 | compatible: |
| 22 | items: |
| 23 | - enum: |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 24 | - renesas,tmu-r8a73a4 # R-Mobile APE6 |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 25 | - renesas,tmu-r8a7740 # R-Mobile A1 |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 26 | - renesas,tmu-r8a7742 # RZ/G1H |
| 27 | - renesas,tmu-r8a7743 # RZ/G1M |
| 28 | - renesas,tmu-r8a7744 # RZ/G1N |
| 29 | - renesas,tmu-r8a7745 # RZ/G1E |
| 30 | - renesas,tmu-r8a77470 # RZ/G1C |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 31 | - renesas,tmu-r8a774a1 # RZ/G2M |
| 32 | - renesas,tmu-r8a774b1 # RZ/G2N |
| 33 | - renesas,tmu-r8a774c0 # RZ/G2E |
| 34 | - renesas,tmu-r8a774e1 # RZ/G2H |
| 35 | - renesas,tmu-r8a7778 # R-Car M1A |
| 36 | - renesas,tmu-r8a7779 # R-Car H1 |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 37 | - renesas,tmu-r8a7790 # R-Car H2 |
| 38 | - renesas,tmu-r8a7791 # R-Car M2-W |
| 39 | - renesas,tmu-r8a7792 # R-Car V2H |
| 40 | - renesas,tmu-r8a7793 # R-Car M2-N |
| 41 | - renesas,tmu-r8a7794 # R-Car E2 |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 42 | - renesas,tmu-r8a7795 # R-Car H3 |
| 43 | - renesas,tmu-r8a7796 # R-Car M3-W |
| 44 | - renesas,tmu-r8a77961 # R-Car M3-W+ |
| 45 | - renesas,tmu-r8a77965 # R-Car M3-N |
| 46 | - renesas,tmu-r8a77970 # R-Car V3M |
| 47 | - renesas,tmu-r8a77980 # R-Car V3H |
| 48 | - renesas,tmu-r8a77990 # R-Car E3 |
| 49 | - renesas,tmu-r8a77995 # R-Car D3 |
| 50 | - renesas,tmu-r8a779a0 # R-Car V3U |
| 51 | - renesas,tmu-r8a779f0 # R-Car S4-8 |
| 52 | - renesas,tmu-r8a779g0 # R-Car V4H |
Tom Rini | 762f85b | 2024-07-20 11:15:10 -0600 | [diff] [blame] | 53 | - renesas,tmu-r8a779h0 # R-Car V4M |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 54 | - const: renesas,tmu |
| 55 | |
| 56 | reg: |
| 57 | maxItems: 1 |
| 58 | |
| 59 | interrupts: |
| 60 | minItems: 2 |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 61 | items: |
| 62 | - description: Underflow interrupt, channel 0 |
| 63 | - description: Underflow interrupt, channel 1 |
| 64 | - description: Underflow interrupt, channel 2 |
| 65 | - description: Input capture interrupt, channel 2 |
| 66 | |
| 67 | interrupt-names: |
| 68 | minItems: 2 |
| 69 | items: |
| 70 | - const: tuni0 |
| 71 | - const: tuni1 |
| 72 | - const: tuni2 |
| 73 | - const: ticpi2 |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 74 | |
| 75 | clocks: |
| 76 | maxItems: 1 |
| 77 | |
| 78 | clock-names: |
| 79 | const: fck |
| 80 | |
| 81 | power-domains: |
| 82 | maxItems: 1 |
| 83 | |
| 84 | resets: |
| 85 | maxItems: 1 |
| 86 | |
| 87 | '#renesas,channels': |
| 88 | description: |
| 89 | Number of channels implemented by the timer. |
| 90 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 91 | enum: [ 2, 3 ] |
| 92 | default: 3 |
| 93 | |
| 94 | required: |
| 95 | - compatible |
| 96 | - reg |
| 97 | - interrupts |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 98 | - interrupt-names |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 99 | - clocks |
| 100 | - clock-names |
| 101 | - power-domains |
| 102 | |
| 103 | if: |
| 104 | not: |
| 105 | properties: |
| 106 | compatible: |
| 107 | contains: |
| 108 | enum: |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 109 | - renesas,tmu-r8a73a4 |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 110 | - renesas,tmu-r8a7740 |
| 111 | - renesas,tmu-r8a7778 |
| 112 | - renesas,tmu-r8a7779 |
| 113 | then: |
| 114 | required: |
| 115 | - resets |
| 116 | |
| 117 | additionalProperties: false |
| 118 | |
| 119 | examples: |
| 120 | - | |
| 121 | #include <dt-bindings/clock/r8a7779-clock.h> |
| 122 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 123 | #include <dt-bindings/power/r8a7779-sysc.h> |
| 124 | tmu0: timer@ffd80000 { |
| 125 | compatible = "renesas,tmu-r8a7779", "renesas,tmu"; |
| 126 | reg = <0xffd80000 0x30>; |
| 127 | interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, |
| 128 | <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 129 | <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, |
| 130 | <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; |
| 131 | interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 132 | clocks = <&mstp0_clks R8A7779_CLK_TMU0>; |
| 133 | clock-names = "fck"; |
| 134 | power-domains = <&sysc R8A7779_PD_ALWAYS_ON>; |
| 135 | #renesas,channels = <3>; |
| 136 | }; |