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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
wdenk4fc95692003-02-28 00:49:47 +00002/*
Wolfgang Denkf710efd2010-07-24 20:22:02 +02003 * (C) Copyright 2002-2010
wdenk4fc95692003-02-28 00:49:47 +00004 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
wdenk4fc95692003-02-28 00:49:47 +00005 */
6
7#ifndef __ASM_GBL_DATA_H
8#define __ASM_GBL_DATA_H
9
Tom Rini10e6a372023-12-14 13:16:52 -050010#include <linux/types.h>
wdenk4fc95692003-02-28 00:49:47 +000011#include <asm/regdef.h>
Tom Rinidee15a92024-04-30 20:40:48 -060012#include <asm/u-boot.h>
Stefan Roese9eff8a92020-12-11 17:05:23 +010013
14struct octeon_eeprom_mac_addr {
15 u8 mac_addr_base[6];
16 u8 count;
17};
wdenk4fc95692003-02-28 00:49:47 +000018
Simon Glass3ac47d72012-12-13 20:48:30 +000019/* Architecture-specific global data */
20struct arch_global_data {
Paul Burton8d6600b2016-01-29 13:54:52 +000021#ifdef CONFIG_DYNAMIC_IO_PORT_BASE
22 unsigned long io_port_base;
23#endif
Wills Wang833a1a82016-03-16 16:59:52 +080024#ifdef CONFIG_ARCH_ATH79
25 unsigned long id;
26 unsigned long soc;
27 unsigned long rev;
28 unsigned long ver;
29#endif
Paul Burtondc2037e2016-09-21 11:18:48 +010030#ifdef CONFIG_SYS_CACHE_SIZE_AUTO
31 unsigned short l1i_line_size;
32 unsigned short l1d_line_size;
33#endif
Paul Burton81560782016-09-21 11:18:54 +010034#ifdef CONFIG_MIPS_L2_CACHE
35 unsigned short l2_line_size;
36#endif
developer7c287362020-04-21 09:28:32 +020037#ifdef CONFIG_ARCH_MTMIPS
38 unsigned long timer_freq;
39#endif
Stefan Roese9eff8a92020-12-11 17:05:23 +010040#ifdef CONFIG_ARCH_OCTEON
41 struct octeon_eeprom_mac_addr mac_desc;
42#endif
Simon Glass3ac47d72012-12-13 20:48:30 +000043};
44
Simon Glass9b9ba9a2012-12-13 20:49:19 +000045#include <asm-generic/global_data.h>
wdenk4fc95692003-02-28 00:49:47 +000046
wdenk874ac262003-07-24 23:38:38 +000047#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("k0")
wdenk4fc95692003-02-28 00:49:47 +000048
49#endif /* __ASM_GBL_DATA_H */