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Guennadi Liakhovetski7c6a8562009-02-07 01:18:07 +01001/*
2 * Copyright (C) 2009
3 * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
4 *
Stefano Babic7faee912011-08-21 10:45:44 +02005 * Copyright (C) 2011
6 * Stefano Babic, DENX Software Engineering, <sbabic@denx.de>
7 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02008 * SPDX-License-Identifier: GPL-2.0+
Guennadi Liakhovetski7c6a8562009-02-07 01:18:07 +01009 */
10#include <common.h>
Simon Glass2772b4d2014-10-01 19:57:26 -060011#include <errno.h>
12#include <dm.h>
13#include <malloc.h>
Stefano Babicd77fe992010-07-06 17:05:06 +020014#include <asm/arch/imx-regs.h>
Stefano Babic7faee912011-08-21 10:45:44 +020015#include <asm/gpio.h>
Stefano Babicd77fe992010-07-06 17:05:06 +020016#include <asm/io.h>
Guennadi Liakhovetski7c6a8562009-02-07 01:18:07 +010017
Stefano Babic7faee912011-08-21 10:45:44 +020018enum mxc_gpio_direction {
19 MXC_GPIO_DIRECTION_IN,
20 MXC_GPIO_DIRECTION_OUT,
21};
22
Simon Glass2772b4d2014-10-01 19:57:26 -060023#define GPIO_PER_BANK 32
24
25struct mxc_gpio_plat {
Peng Fan86be4262015-02-10 14:46:33 +080026 int bank_index;
Simon Glass2772b4d2014-10-01 19:57:26 -060027 struct gpio_regs *regs;
28};
29
30struct mxc_bank_info {
Simon Glass2772b4d2014-10-01 19:57:26 -060031 struct gpio_regs *regs;
32};
33
34#ifndef CONFIG_DM_GPIO
Vikram Narayanan10999cf2012-04-10 04:26:08 +000035#define GPIO_TO_PORT(n) (n / 32)
Stefano Babic7faee912011-08-21 10:45:44 +020036
Guennadi Liakhovetski7c6a8562009-02-07 01:18:07 +010037/* GPIO port description */
38static unsigned long gpio_ports[] = {
Stefano Babicd77fe992010-07-06 17:05:06 +020039 [0] = GPIO1_BASE_ADDR,
40 [1] = GPIO2_BASE_ADDR,
41 [2] = GPIO3_BASE_ADDR,
tremcf233ed2012-08-25 05:30:33 +000042#if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \
Adrian Alonso840d2e32015-08-11 11:19:51 -050043 defined(CONFIG_MX53) || defined(CONFIG_MX6) || \
44 defined(CONFIG_MX7)
Stefano Babicd77fe992010-07-06 17:05:06 +020045 [3] = GPIO4_BASE_ADDR,
46#endif
Adrian Alonso840d2e32015-08-11 11:19:51 -050047#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) || \
48 defined(CONFIG_MX7)
Liu Hui-R64343a71164c2011-01-03 22:27:38 +000049 [4] = GPIO5_BASE_ADDR,
Peng Fanf5dd87e2015-07-20 19:28:31 +080050#ifndef CONFIG_MX6UL
Liu Hui-R64343a71164c2011-01-03 22:27:38 +000051 [5] = GPIO6_BASE_ADDR,
tremcf233ed2012-08-25 05:30:33 +000052#endif
Peng Fanf5dd87e2015-07-20 19:28:31 +080053#endif
Adrian Alonso840d2e32015-08-11 11:19:51 -050054#if defined(CONFIG_MX53) || defined(CONFIG_MX6) || defined(CONFIG_MX7)
Peng Fanf5dd87e2015-07-20 19:28:31 +080055#ifndef CONFIG_MX6UL
Liu Hui-R64343a71164c2011-01-03 22:27:38 +000056 [6] = GPIO7_BASE_ADDR,
57#endif
Peng Fanf5dd87e2015-07-20 19:28:31 +080058#endif
Guennadi Liakhovetski7c6a8562009-02-07 01:18:07 +010059};
60
Stefano Babic7faee912011-08-21 10:45:44 +020061static int mxc_gpio_direction(unsigned int gpio,
62 enum mxc_gpio_direction direction)
Guennadi Liakhovetski7c6a8562009-02-07 01:18:07 +010063{
Vikram Narayananfbdf6bc2012-04-10 04:26:20 +000064 unsigned int port = GPIO_TO_PORT(gpio);
Stefano Babicd77fe992010-07-06 17:05:06 +020065 struct gpio_regs *regs;
Guennadi Liakhovetski7c6a8562009-02-07 01:18:07 +010066 u32 l;
67
68 if (port >= ARRAY_SIZE(gpio_ports))
Joe Hershbergerf8928f12011-11-11 15:55:36 -060069 return -1;
Guennadi Liakhovetski7c6a8562009-02-07 01:18:07 +010070
71 gpio &= 0x1f;
72
Stefano Babicd77fe992010-07-06 17:05:06 +020073 regs = (struct gpio_regs *)gpio_ports[port];
74
75 l = readl(&regs->gpio_dir);
76
Guennadi Liakhovetski7c6a8562009-02-07 01:18:07 +010077 switch (direction) {
Stefano Babicd77fe992010-07-06 17:05:06 +020078 case MXC_GPIO_DIRECTION_OUT:
Guennadi Liakhovetski7c6a8562009-02-07 01:18:07 +010079 l |= 1 << gpio;
80 break;
Stefano Babicd77fe992010-07-06 17:05:06 +020081 case MXC_GPIO_DIRECTION_IN:
Guennadi Liakhovetski7c6a8562009-02-07 01:18:07 +010082 l &= ~(1 << gpio);
83 }
Stefano Babicd77fe992010-07-06 17:05:06 +020084 writel(l, &regs->gpio_dir);
Guennadi Liakhovetski7c6a8562009-02-07 01:18:07 +010085
86 return 0;
87}
88
Joe Hershbergerf8928f12011-11-11 15:55:36 -060089int gpio_set_value(unsigned gpio, int value)
Guennadi Liakhovetski7c6a8562009-02-07 01:18:07 +010090{
Vikram Narayananfbdf6bc2012-04-10 04:26:20 +000091 unsigned int port = GPIO_TO_PORT(gpio);
Stefano Babicd77fe992010-07-06 17:05:06 +020092 struct gpio_regs *regs;
Guennadi Liakhovetski7c6a8562009-02-07 01:18:07 +010093 u32 l;
94
95 if (port >= ARRAY_SIZE(gpio_ports))
Joe Hershbergerf8928f12011-11-11 15:55:36 -060096 return -1;
Guennadi Liakhovetski7c6a8562009-02-07 01:18:07 +010097
98 gpio &= 0x1f;
99
Stefano Babicd77fe992010-07-06 17:05:06 +0200100 regs = (struct gpio_regs *)gpio_ports[port];
101
102 l = readl(&regs->gpio_dr);
Guennadi Liakhovetski7c6a8562009-02-07 01:18:07 +0100103 if (value)
104 l |= 1 << gpio;
105 else
106 l &= ~(1 << gpio);
Stefano Babicd77fe992010-07-06 17:05:06 +0200107 writel(l, &regs->gpio_dr);
Joe Hershbergerf8928f12011-11-11 15:55:36 -0600108
109 return 0;
Guennadi Liakhovetski7c6a8562009-02-07 01:18:07 +0100110}
Stefano Babica44d2a52010-04-13 12:07:00 +0200111
Joe Hershbergerf8928f12011-11-11 15:55:36 -0600112int gpio_get_value(unsigned gpio)
Stefano Babica44d2a52010-04-13 12:07:00 +0200113{
Vikram Narayananfbdf6bc2012-04-10 04:26:20 +0000114 unsigned int port = GPIO_TO_PORT(gpio);
Stefano Babicd77fe992010-07-06 17:05:06 +0200115 struct gpio_regs *regs;
Joe Hershbergerf8928f12011-11-11 15:55:36 -0600116 u32 val;
Stefano Babica44d2a52010-04-13 12:07:00 +0200117
118 if (port >= ARRAY_SIZE(gpio_ports))
Joe Hershbergerf8928f12011-11-11 15:55:36 -0600119 return -1;
Stefano Babica44d2a52010-04-13 12:07:00 +0200120
121 gpio &= 0x1f;
122
Stefano Babicd77fe992010-07-06 17:05:06 +0200123 regs = (struct gpio_regs *)gpio_ports[port];
124
Benoît Thébaudeaudaaf7a92012-08-20 10:55:41 +0000125 val = (readl(&regs->gpio_psr) >> gpio) & 0x01;
Stefano Babica44d2a52010-04-13 12:07:00 +0200126
Joe Hershbergerf8928f12011-11-11 15:55:36 -0600127 return val;
Stefano Babica44d2a52010-04-13 12:07:00 +0200128}
Stefano Babic7faee912011-08-21 10:45:44 +0200129
Joe Hershbergerf8928f12011-11-11 15:55:36 -0600130int gpio_request(unsigned gpio, const char *label)
Stefano Babic7faee912011-08-21 10:45:44 +0200131{
Vikram Narayananfbdf6bc2012-04-10 04:26:20 +0000132 unsigned int port = GPIO_TO_PORT(gpio);
Stefano Babic7faee912011-08-21 10:45:44 +0200133 if (port >= ARRAY_SIZE(gpio_ports))
Joe Hershbergerf8928f12011-11-11 15:55:36 -0600134 return -1;
Stefano Babic7faee912011-08-21 10:45:44 +0200135 return 0;
136}
137
Joe Hershbergerf8928f12011-11-11 15:55:36 -0600138int gpio_free(unsigned gpio)
Stefano Babic7faee912011-08-21 10:45:44 +0200139{
Joe Hershbergerf8928f12011-11-11 15:55:36 -0600140 return 0;
Stefano Babic7faee912011-08-21 10:45:44 +0200141}
142
Joe Hershbergerf8928f12011-11-11 15:55:36 -0600143int gpio_direction_input(unsigned gpio)
Stefano Babic7faee912011-08-21 10:45:44 +0200144{
Joe Hershbergerf8928f12011-11-11 15:55:36 -0600145 return mxc_gpio_direction(gpio, MXC_GPIO_DIRECTION_IN);
Stefano Babic7faee912011-08-21 10:45:44 +0200146}
147
Joe Hershbergerf8928f12011-11-11 15:55:36 -0600148int gpio_direction_output(unsigned gpio, int value)
Stefano Babic7faee912011-08-21 10:45:44 +0200149{
Dirk Behme1e0803f2013-07-15 15:58:27 +0200150 int ret = gpio_set_value(gpio, value);
Stefano Babic7faee912011-08-21 10:45:44 +0200151
152 if (ret < 0)
153 return ret;
154
Dirk Behme1e0803f2013-07-15 15:58:27 +0200155 return mxc_gpio_direction(gpio, MXC_GPIO_DIRECTION_OUT);
Stefano Babic7faee912011-08-21 10:45:44 +0200156}
Simon Glass2772b4d2014-10-01 19:57:26 -0600157#endif
158
159#ifdef CONFIG_DM_GPIO
Peng Fan0ed2cb12015-02-10 14:46:34 +0800160#include <fdtdec.h>
161DECLARE_GLOBAL_DATA_PTR;
162
Simon Glass2772b4d2014-10-01 19:57:26 -0600163static int mxc_gpio_is_output(struct gpio_regs *regs, int offset)
164{
165 u32 val;
166
167 val = readl(&regs->gpio_dir);
168
169 return val & (1 << offset) ? 1 : 0;
170}
171
172static void mxc_gpio_bank_direction(struct gpio_regs *regs, int offset,
173 enum mxc_gpio_direction direction)
174{
175 u32 l;
176
177 l = readl(&regs->gpio_dir);
178
179 switch (direction) {
180 case MXC_GPIO_DIRECTION_OUT:
181 l |= 1 << offset;
182 break;
183 case MXC_GPIO_DIRECTION_IN:
184 l &= ~(1 << offset);
185 }
186 writel(l, &regs->gpio_dir);
187}
188
189static void mxc_gpio_bank_set_value(struct gpio_regs *regs, int offset,
190 int value)
191{
192 u32 l;
193
194 l = readl(&regs->gpio_dr);
195 if (value)
196 l |= 1 << offset;
197 else
198 l &= ~(1 << offset);
199 writel(l, &regs->gpio_dr);
200}
201
202static int mxc_gpio_bank_get_value(struct gpio_regs *regs, int offset)
203{
204 return (readl(&regs->gpio_psr) >> offset) & 0x01;
205}
206
Simon Glass2772b4d2014-10-01 19:57:26 -0600207/* set GPIO pin 'gpio' as an input */
208static int mxc_gpio_direction_input(struct udevice *dev, unsigned offset)
209{
210 struct mxc_bank_info *bank = dev_get_priv(dev);
Simon Glass2772b4d2014-10-01 19:57:26 -0600211
212 /* Configure GPIO direction as input. */
213 mxc_gpio_bank_direction(bank->regs, offset, MXC_GPIO_DIRECTION_IN);
214
215 return 0;
216}
217
218/* set GPIO pin 'gpio' as an output, with polarity 'value' */
219static int mxc_gpio_direction_output(struct udevice *dev, unsigned offset,
220 int value)
221{
222 struct mxc_bank_info *bank = dev_get_priv(dev);
Simon Glass2772b4d2014-10-01 19:57:26 -0600223
224 /* Configure GPIO output value. */
225 mxc_gpio_bank_set_value(bank->regs, offset, value);
226
227 /* Configure GPIO direction as output. */
228 mxc_gpio_bank_direction(bank->regs, offset, MXC_GPIO_DIRECTION_OUT);
229
230 return 0;
231}
232
233/* read GPIO IN value of pin 'gpio' */
234static int mxc_gpio_get_value(struct udevice *dev, unsigned offset)
235{
236 struct mxc_bank_info *bank = dev_get_priv(dev);
Simon Glass2772b4d2014-10-01 19:57:26 -0600237
238 return mxc_gpio_bank_get_value(bank->regs, offset);
239}
240
241/* write GPIO OUT value to pin 'gpio' */
242static int mxc_gpio_set_value(struct udevice *dev, unsigned offset,
243 int value)
244{
245 struct mxc_bank_info *bank = dev_get_priv(dev);
Simon Glass2772b4d2014-10-01 19:57:26 -0600246
247 mxc_gpio_bank_set_value(bank->regs, offset, value);
248
249 return 0;
250}
251
Simon Glass2772b4d2014-10-01 19:57:26 -0600252static int mxc_gpio_get_function(struct udevice *dev, unsigned offset)
253{
254 struct mxc_bank_info *bank = dev_get_priv(dev);
255
Simon Glass2772b4d2014-10-01 19:57:26 -0600256 /* GPIOF_FUNC is not implemented yet */
257 if (mxc_gpio_is_output(bank->regs, offset))
258 return GPIOF_OUTPUT;
259 else
260 return GPIOF_INPUT;
261}
262
263static const struct dm_gpio_ops gpio_mxc_ops = {
Simon Glass2772b4d2014-10-01 19:57:26 -0600264 .direction_input = mxc_gpio_direction_input,
265 .direction_output = mxc_gpio_direction_output,
266 .get_value = mxc_gpio_get_value,
267 .set_value = mxc_gpio_set_value,
268 .get_function = mxc_gpio_get_function,
Simon Glass2772b4d2014-10-01 19:57:26 -0600269};
270
Simon Glass2772b4d2014-10-01 19:57:26 -0600271static int mxc_gpio_probe(struct udevice *dev)
272{
273 struct mxc_bank_info *bank = dev_get_priv(dev);
274 struct mxc_gpio_plat *plat = dev_get_platdata(dev);
Simon Glassde0977b2015-03-05 12:25:20 -0700275 struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
Simon Glass2772b4d2014-10-01 19:57:26 -0600276 int banknum;
277 char name[18], *str;
278
Peng Fan86be4262015-02-10 14:46:33 +0800279 banknum = plat->bank_index;
Simon Glass2772b4d2014-10-01 19:57:26 -0600280 sprintf(name, "GPIO%d_", banknum + 1);
281 str = strdup(name);
282 if (!str)
283 return -ENOMEM;
284 uc_priv->bank_name = str;
285 uc_priv->gpio_count = GPIO_PER_BANK;
286 bank->regs = plat->regs;
287
288 return 0;
289}
290
Peng Fan0ed2cb12015-02-10 14:46:34 +0800291static int mxc_gpio_bind(struct udevice *dev)
292{
293 struct mxc_gpio_plat *plat = dev->platdata;
294 fdt_addr_t addr;
295
296 /*
297 * If platdata already exsits, directly return.
298 * Actually only when DT is not supported, platdata
299 * is statically initialized in U_BOOT_DEVICES.Here
300 * will return.
301 */
302 if (plat)
303 return 0;
304
Simon Glassba1dea42017-05-17 17:18:05 -0600305 addr = devfdt_get_addr(dev);
Peng Fan0ed2cb12015-02-10 14:46:34 +0800306 if (addr == FDT_ADDR_T_NONE)
307 return -ENODEV;
308
309 /*
310 * TODO:
311 * When every board is converted to driver model and DT is supported,
312 * this can be done by auto-alloc feature, but not using calloc
313 * to alloc memory for platdata.
314 */
315 plat = calloc(1, sizeof(*plat));
316 if (!plat)
317 return -ENOMEM;
318
319 plat->regs = (struct gpio_regs *)addr;
320 plat->bank_index = dev->req_seq;
321 dev->platdata = plat;
322
323 return 0;
324}
325
326static const struct udevice_id mxc_gpio_ids[] = {
327 { .compatible = "fsl,imx35-gpio" },
328 { }
329};
330
Simon Glass2772b4d2014-10-01 19:57:26 -0600331U_BOOT_DRIVER(gpio_mxc) = {
332 .name = "gpio_mxc",
333 .id = UCLASS_GPIO,
334 .ops = &gpio_mxc_ops,
335 .probe = mxc_gpio_probe,
336 .priv_auto_alloc_size = sizeof(struct mxc_bank_info),
Peng Fan0ed2cb12015-02-10 14:46:34 +0800337 .of_match = mxc_gpio_ids,
338 .bind = mxc_gpio_bind,
339};
340
Masahiro Yamada366b24f2015-08-12 07:31:55 +0900341#if !CONFIG_IS_ENABLED(OF_CONTROL)
Peng Fan0ed2cb12015-02-10 14:46:34 +0800342static const struct mxc_gpio_plat mxc_plat[] = {
343 { 0, (struct gpio_regs *)GPIO1_BASE_ADDR },
344 { 1, (struct gpio_regs *)GPIO2_BASE_ADDR },
345 { 2, (struct gpio_regs *)GPIO3_BASE_ADDR },
346#if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \
347 defined(CONFIG_MX53) || defined(CONFIG_MX6)
348 { 3, (struct gpio_regs *)GPIO4_BASE_ADDR },
349#endif
350#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6)
351 { 4, (struct gpio_regs *)GPIO5_BASE_ADDR },
352 { 5, (struct gpio_regs *)GPIO6_BASE_ADDR },
353#endif
354#if defined(CONFIG_MX53) || defined(CONFIG_MX6)
355 { 6, (struct gpio_regs *)GPIO7_BASE_ADDR },
356#endif
Simon Glass2772b4d2014-10-01 19:57:26 -0600357};
358
359U_BOOT_DEVICES(mxc_gpios) = {
360 { "gpio_mxc", &mxc_plat[0] },
361 { "gpio_mxc", &mxc_plat[1] },
362 { "gpio_mxc", &mxc_plat[2] },
363#if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \
364 defined(CONFIG_MX53) || defined(CONFIG_MX6)
365 { "gpio_mxc", &mxc_plat[3] },
366#endif
367#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6)
368 { "gpio_mxc", &mxc_plat[4] },
369 { "gpio_mxc", &mxc_plat[5] },
370#endif
371#if defined(CONFIG_MX53) || defined(CONFIG_MX6)
372 { "gpio_mxc", &mxc_plat[6] },
373#endif
374};
375#endif
Peng Fan0ed2cb12015-02-10 14:46:34 +0800376#endif