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Simon Glass2cffe662015-08-30 16:55:38 -06001if ARCH_ROCKCHIP
2
Heiko Stübner5c91e2b2016-07-16 00:17:15 +02003config ROCKCHIP_RK3036
4 bool "Support Rockchip RK3036"
5 select CPU_V7
Kever Yang0d3d7832016-07-19 21:16:59 +08006 select SUPPORT_SPL
7 select SPL
Heiko Stübner5c91e2b2016-07-16 00:17:15 +02008 help
9 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
10 including NEON and GPU, Mali-400 graphics, several DDR3 options
11 and video codec support. Peripherals include Gigabit Ethernet,
12 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
13
Heiko Stübneref6db5e2017-02-18 19:46:36 +010014config ROCKCHIP_RK3188
15 bool "Support Rockchip RK3188"
16 select CPU_V7
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080017 select SPL_BOARD_INIT if SPL
Heiko Stübneref6db5e2017-02-18 19:46:36 +010018 select SUPPORT_SPL
19 select SUPPORT_TPL
20 select SPL
21 select TPL
Heiko Stübner015f69a2017-04-06 00:19:36 +020022 select BOARD_LATE_INIT
Heiko Stübneref6db5e2017-02-18 19:46:36 +010023 select ROCKCHIP_BROM_HELPER
24 help
25 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
26 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
27 video interfaces, several memory options and video codec support.
28 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
29 UART, SPI, I2C and PWMs.
30
Simon Glass2cffe662015-08-30 16:55:38 -060031config ROCKCHIP_RK3288
32 bool "Support Rockchip RK3288"
Andreas Färber6c427032016-07-14 05:09:26 +020033 select CPU_V7
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080034 select SPL_BOARD_INIT if SPL
Kever Yang0d3d7832016-07-19 21:16:59 +080035 select SUPPORT_SPL
36 select SPL
Simon Glass2cffe662015-08-30 16:55:38 -060037 help
38 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
39 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
40 video interfaces supporting HDMI and eDP, several DDR3 options
41 and video codec support. Peripherals include Gigabit Ethernet,
Andreas Färber531e8e02016-11-02 18:03:01 +010042 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
Simon Glass2cffe662015-08-30 16:55:38 -060043
Kever Yangec02b3c2017-02-23 15:37:51 +080044config ROCKCHIP_RK3328
45 bool "Support Rockchip RK3328"
46 select ARM64
47 help
48 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
49 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
50 video interfaces supporting HDMI and eDP, several DDR3 options
51 and video codec support. Peripherals include Gigabit Ethernet,
52 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
53
Andreas Färber9e3ad682017-05-15 17:51:18 +080054config ROCKCHIP_RK3368
55 bool "Support Rockchip RK3368"
56 select ARM64
57 select SYS_NS16550
58 help
59 The Rockchip RK3328 is a ARM-based SoC with a octa-core Cortex-A53.
60 including NEON and GPU, 512KB L2 cache for big cluster and 256 KB
61 L2 cache for little cluser, PowerVR G6110 based graphics, one video
62 output processor supporting LVDSHDMIeDP, several DDR3 options
63 and video codec support. Peripherals include Gigabit Ethernet,
64 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
65
Kever Yang0d3d7832016-07-19 21:16:59 +080066config ROCKCHIP_RK3399
67 bool "Support Rockchip RK3399"
68 select ARM64
Kever Yang16efdfd2017-02-22 16:56:38 +080069 select SUPPORT_SPL
70 select SPL
71 select SPL_SEPARATE_BSS
Philipp Tomsichc2448712017-03-15 12:08:44 +010072 select ENABLE_ARM_SOC_BOOT0_HOOK
Philipp Tomsich41029e62017-04-01 12:59:25 +020073 select DEBUG_UART_BOARD_INIT
Kever Yang0d3d7832016-07-19 21:16:59 +080074 help
75 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
76 and quad-core Cortex-A53.
77 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
78 video interfaces supporting HDMI and eDP, several DDR3 options
79 and video codec support. Peripherals include Gigabit Ethernet,
80 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
81
Andy Yan2d982da2017-06-01 18:00:55 +080082config ROCKCHIP_RV1108
83 bool "Support Rockchip RV1108"
84 select CPU_V7
85 help
86 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
87 and a DSP.
88
Xu Ziyuan5401eb82016-07-12 19:09:49 +080089config ROCKCHIP_SPL_BACK_TO_BROM
90 bool "SPL returns to bootrom"
91 default y if ROCKCHIP_RK3036
Heiko Stübner355a8802017-02-18 19:46:25 +010092 select ROCKCHIP_BROM_HELPER
Xu Ziyuan5401eb82016-07-12 19:09:49 +080093 help
94 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
95 SPL will return to the boot rom, which will then load the U-Boot
96 binary to keep going on.
97
Kever Yange484f772017-04-20 17:03:46 +080098config ROCKCHIP_SPL_RESERVE_IRAM
99 hex "Size of IRAM reserved in SPL"
100 default 0x4000
101 help
102 SPL may need reserve memory for firmware loaded by SPL, whose load
103 address is in IRAM and may overlay with SPL text area if not
104 reserved.
105
Heiko Stübner355a8802017-02-18 19:46:25 +0100106config ROCKCHIP_BROM_HELPER
107 bool
108
Sandy Pattersond70f0f32016-08-29 07:31:16 -0400109config SPL_MMC_SUPPORT
110 default y if !ROCKCHIP_SPL_BACK_TO_BROM
111
huang lin1115b642015-11-17 14:20:27 +0800112source "arch/arm/mach-rockchip/rk3036/Kconfig"
Heiko Stübneref6db5e2017-02-18 19:46:36 +0100113source "arch/arm/mach-rockchip/rk3188/Kconfig"
Heiko Stübner5c91e2b2016-07-16 00:17:15 +0200114source "arch/arm/mach-rockchip/rk3288/Kconfig"
Kever Yangec02b3c2017-02-23 15:37:51 +0800115source "arch/arm/mach-rockchip/rk3328/Kconfig"
Andreas Färber9e3ad682017-05-15 17:51:18 +0800116source "arch/arm/mach-rockchip/rk3368/Kconfig"
Kever Yang0d3d7832016-07-19 21:16:59 +0800117source "arch/arm/mach-rockchip/rk3399/Kconfig"
Andy Yan2d982da2017-06-01 18:00:55 +0800118source "arch/arm/mach-rockchip/rv1108/Kconfig"
Simon Glass2cffe662015-08-30 16:55:38 -0600119endif