blob: f5462f88b1eb120ef17c21632622dbe9dec9abf8 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Christian Riesch63e341b2011-12-09 09:47:37 +00002/*
3 * (C) Copyright 2002
4 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
5 *
6 * (C) Copyright 2008
7 * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
Christian Riesch63e341b2011-12-09 09:47:37 +00008 */
9
10MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\
Albert ARIBAUDa02e3cc2013-04-12 05:14:32 +000011 LENGTH = CONFIG_SPL_MAX_FOOTPRINT }
Christian Riesch63e341b2011-12-09 09:47:37 +000012
13OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
14OUTPUT_ARCH(arm)
15ENTRY(_start)
16SECTIONS
17{
18 . = 0x00000000;
19
20 . = ALIGN(4);
21 .text :
22 {
23 __start = .;
Benoît Thébaudeau3f7740f2014-08-21 15:43:11 +020024 *(.vectors)
Benoît Thébaudeau3954db82013-04-11 09:36:03 +000025 arch/arm/cpu/arm926ejs/start.o (.text*)
Christian Riesch63e341b2011-12-09 09:47:37 +000026 *(.text*)
27 } >.sram
28
29 . = ALIGN(4);
30 .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
31
32 . = ALIGN(4);
33 .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
Marek Vasut607092a2012-10-12 10:27:03 +000034
35 . = ALIGN(4);
Fabien Parentd96020c2016-11-29 14:23:40 +010036 .u_boot_list : { KEEP(*(SORT(.u_boot_list*))); } >.sram
37
38 . = ALIGN(4);
Christian Riesch63e341b2011-12-09 09:47:37 +000039 .rel.dyn : {
40 __rel_dyn_start = .;
41 *(.rel*)
42 __rel_dyn_end = .;
43 } >.sram
44
Christian Riesch63e341b2011-12-09 09:47:37 +000045 .bss :
46 {
47 . = ALIGN(4);
48 __bss_start = .;
49 *(.bss*)
50 . = ALIGN(4);
Simon Glassed70c8f2013-03-14 06:54:53 +000051 __bss_end = .;
Christian Riesch63e341b2011-12-09 09:47:37 +000052 } >.sram
53
54 __image_copy_end = .;
Albert ARIBAUD9d25fa42014-02-22 17:53:42 +010055
56 .end :
57 {
58 *(.__end)
59 }
Christian Riesch63e341b2011-12-09 09:47:37 +000060}