| Michal Simek | 6471f8e | 2017-11-02 11:51:59 +0100 | [diff] [blame] | 1 | /* |
| 2 | * MIO pin configuration defines for Xilinx ZynqMP |
| 3 | * |
| 4 | * Copyright (C) 2017 Xilinx, Inc. |
| 5 | * Author: Chirag Parekh <chirag.parekh@xilinx.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License |
| 9 | * version 2 as published by the Free Software Foundation. |
| 10 | * |
| 11 | * You should have received a copy of the GNU General Public License |
| 12 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 13 | */ |
| 14 | |
| 15 | #ifndef _DT_BINDINGS_PINCTRL_ZYNQMP_H |
| 16 | #define _DT_BINDINGS_PINCTRL_ZYNQMP_H |
| 17 | |
| 18 | /* Bit value for IO standards */ |
| 19 | #define IO_STANDARD_LVCMOS33 0 |
| 20 | #define IO_STANDARD_LVCMOS18 1 |
| 21 | |
| 22 | /* Bit values for Slew Rates */ |
| 23 | #define SLEW_RATE_FAST 0 |
| 24 | #define SLEW_RATE_SLOW 1 |
| 25 | |
| 26 | /* Bit values for Pin inputs */ |
| 27 | #define PIN_INPUT_TYPE_CMOS 0 |
| 28 | #define PIN_INPUT_TYPE_SCHMITT 1 |
| 29 | |
| 30 | #endif /* _DT_BINDINGS_PINCTRL_ZYNQMP_H */ |