blob: 323a674e3a62f3aef69c21a8fe2ff641be646801 [file] [log] [blame]
Michal Simekc9ce08d2017-11-02 11:42:12 +01001/*
2 * dts file for Xilinx ZynqMP ZCU102 Rev1.0
3 *
4 * (C) Copyright 2016, Xilinx, Inc.
5 *
6 * Michal Simek <michal.simek@xilinx.com>
7 *
8 * SPDX-License-Identifier: GPL-2.0+
9 */
10
11#include "zynqmp-zcu102-revB.dts"
12
13/ {
14 model = "ZynqMP ZCU102 Rev1.0";
15 compatible = "xlnx,zynqmp-zcu102-rev1.0", "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
16};
17
18&eeprom {
19 #address-cells = <1>;
20 #size-cells = <1>;
21
22 board_sn: board_sn@0 {
23 reg = <0x0 0x14>;
24 };
25
26 eth_mac: eth_mac@20 {
27 reg = <0x20 0x6>;
28 };
29
30 board_name: board_name@d0 {
31 reg = <0xd0 0x6>;
32 };
33
34 board_revision: board_revision@e0 {
35 reg = <0xe0 0x3>;
36 };
37};