blob: 9a1d2e3368c503fa1cd7e0dadc0df95c57010742 [file] [log] [blame]
Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +09001/*
2 * Configuation settings for the sh7753evb board
3 *
4 * Copyright (C) 2012 Renesas Solutions Corp.
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#ifndef __SH7753EVB_H
10#define __SH7753EVB_H
11
Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +090012#define CONFIG_CPU_SH7753 1
Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +090013
Vladimir Zapolskiy5e72b842016-11-28 00:15:30 +020014#define CONFIG_DISPLAY_BOARDINFO
Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +090015#undef CONFIG_SHOW_BOOT_PROGRESS
Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +090016
17/* MEMORY */
18#define SH7753EVB_SDRAM_BASE (0x40000000)
19#define SH7753EVB_SDRAM_SIZE (512 * 1024 * 1024)
20
Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +090021#define CONFIG_SYS_PBSIZE 256
Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +090022#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
23
24/* SCIF */
Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +090025#define CONFIG_CONS_SCIF2 1
Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +090026
27#define CONFIG_SYS_MEMTEST_START (SH7753EVB_SDRAM_BASE)
28#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
29 480 * 1024 * 1024)
Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +090030#undef CONFIG_SYS_MEMTEST_SCRATCH
31#undef CONFIG_SYS_LOADS_BAUD_CHANGE
32
33#define CONFIG_SYS_SDRAM_BASE (SH7753EVB_SDRAM_BASE)
34#define CONFIG_SYS_SDRAM_SIZE (SH7753EVB_SDRAM_SIZE)
35#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \
36 128 * 1024 * 1024)
37
38#define CONFIG_SYS_MONITOR_BASE 0x00000000
39#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
40#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
41#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
42
Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +090043/* Ether */
Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +090044#define CONFIG_SH_ETHER_USE_PORT 0
45#define CONFIG_SH_ETHER_PHY_ADDR 18
46#define CONFIG_SH_ETHER_CACHE_WRITEBACK 1
47#define CONFIG_SH_ETHER_USE_GETHER 1
Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +090048#define CONFIG_BITBANGMII
49#define CONFIG_BITBANGMII_MULTI
50#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII
51#define CONFIG_PHY_VITESSE
52
53#define SH7753EVB_ETHERNET_MAC_BASE_SPI 0x00090000
54#define SH7753EVB_SPI_SECTOR_SIZE (64 * 1024)
55#define SH7753EVB_ETHERNET_MAC_BASE SH7753EVB_ETHERNET_MAC_BASE_SPI
56#define SH7753EVB_ETHERNET_MAC_SIZE 17
57#define SH7753EVB_ETHERNET_NUM_CH 2
Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +090058
59/* SPI */
Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +090060#define CONFIG_SH_SPI_BASE 0xfe002000
Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +090061
62/* MMCIF */
Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +090063#define CONFIG_SH_MMCIF_ADDR 0xffcb0000
64#define CONFIG_SH_MMCIF_CLK 48000000
65
66/* ENV setting */
67#define CONFIG_ENV_IS_EMBEDDED
Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +090068#define CONFIG_ENV_SECT_SIZE (64 * 1024)
69#define CONFIG_ENV_ADDR (0x00080000)
70#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR)
71#define CONFIG_ENV_OVERWRITE 1
72#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
73#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
74#define CONFIG_EXTRA_ENV_SETTINGS \
75 "netboot=bootp; bootm\0"
76
77/* Board Clock */
78#define CONFIG_SYS_CLK_FREQ 48000000
79#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
80#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
81#define CONFIG_SYS_TMU_CLK_DIV 4
82#endif /* __SH7753EVB_H */