arch/arm/dts/imx6sx-sabreauto.dts

/*
 * Copyright (C) 2014 Freescale Semiconductor, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

/dts-v1/;

#include "imx6sx.dtsi"

/ {
	model = "Freescale i.MX6 SoloX Sabre Auto Board";
	compatible = "fsl,imx6sx-sabreauto", "fsl,imx6sx";

	memory {
		reg = <0x80000000 0x80000000>;
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		vcc_sd3: regulator@0 {
			compatible = "regulator-fixed";
			reg = <0>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_vcc_sd3>;
			regulator-name = "VCC_SD3";
			regulator-min-microvolt = <3000000>;
			regulator-max-microvolt = <3000000>;
			gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
			enable-active-high;
		};
	};
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc3>;
	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
	bus-width = <8>;
	cd-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>;
	wp-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
	keep-power-in-suspend;
	wakeup-source;
	vmmc-supply = <&vcc_sd3>;
	status = "okay";
};

&usdhc4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc4>;
	bus-width = <8>;
	cd-gpios = <&gpio7 11 GPIO_ACTIVE_LOW>;
	no-1-8-v;
	keep-power-in-suspend;
	wakeup-source;
	status = "okay";
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2_1>;
	status = "okay";
};

&i2c3 {
        clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3_2>;
	status = "okay";

	max7310_a: gpio@30 {
		compatible = "maxim,max7310";
		reg = <0x30>;
		gpio-controller;
		#gpio-cells = <2>;
	};

	max7310_b: gpio@32 {
		compatible = "maxim,max7310";
		reg = <0x32>;
		gpio-controller;
		#gpio-cells = <2>;
	};
};

&qspi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_qspi1_1>;
	status = "okay";
	ddrsmp=<2>;

	flash0: n25q256a@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "micron,n25q256a";
		spi-max-frequency = <29000000>;
		reg = <0>;
	};

	flash1: n25q256a@1 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "micron,n25q256a";
		spi-max-frequency = <29000000>;
		reg = <1>;
	};
};

&iomuxc {
	imx6x-sabreauto {
		pinctrl_i2c2_1: i2c2grp-1 {
			fsl,pins = <
				MX6SX_PAD_GPIO1_IO03__I2C2_SDA          0x4001b8b1
				MX6SX_PAD_GPIO1_IO02__I2C2_SCL          0x4001b8b1
			>;
		};

		pinctrl_i2c3_2: i2c3grp-2 {
			fsl,pins = <
				MX6SX_PAD_KEY_ROW4__I2C3_SDA            0x4001b8b1
				MX6SX_PAD_KEY_COL4__I2C3_SCL            0x4001b8b1
			>;
		};

		pinctrl_qspi1_1: qspi1grp_1 {
			fsl,pins = <
				MX6SX_PAD_QSPI1A_DATA0__QSPI1_A_DATA_0  0x70a1
				MX6SX_PAD_QSPI1A_DATA1__QSPI1_A_DATA_1  0x70a1
				MX6SX_PAD_QSPI1A_DATA2__QSPI1_A_DATA_2  0x70a1
				MX6SX_PAD_QSPI1A_DATA3__QSPI1_A_DATA_3  0x70a1
				MX6SX_PAD_QSPI1A_SCLK__QSPI1_A_SCLK     0x70a1
				MX6SX_PAD_QSPI1A_SS0_B__QSPI1_A_SS0_B   0x70a1
				MX6SX_PAD_QSPI1B_DATA0__QSPI1_B_DATA_0  0x70a1
				MX6SX_PAD_QSPI1B_DATA1__QSPI1_B_DATA_1  0x70a1
				MX6SX_PAD_QSPI1B_DATA2__QSPI1_B_DATA_2  0x70a1
				MX6SX_PAD_QSPI1B_DATA3__QSPI1_B_DATA_3  0x70a1
				MX6SX_PAD_QSPI1B_SCLK__QSPI1_B_SCLK     0x70a1
				MX6SX_PAD_QSPI1B_SS0_B__QSPI1_B_SS0_B   0x70a1
			>;
		};

		pinctrl_uart1: uart1grp {
			fsl,pins = <
				MX6SX_PAD_GPIO1_IO04__UART1_TX		0x1b0b1
				MX6SX_PAD_GPIO1_IO05__UART1_RX		0x1b0b1
			>;
		};

		pinctrl_usdhc3: usdhc3grp {
			fsl,pins = <
				MX6SX_PAD_SD3_CMD__USDHC3_CMD		0x17059
				MX6SX_PAD_SD3_CLK__USDHC3_CLK		0x10059
				MX6SX_PAD_SD3_DATA0__USDHC3_DATA0	0x17059
				MX6SX_PAD_SD3_DATA1__USDHC3_DATA1	0x17059
				MX6SX_PAD_SD3_DATA2__USDHC3_DATA2	0x17059
				MX6SX_PAD_SD3_DATA3__USDHC3_DATA3	0x17059
				MX6SX_PAD_SD3_DATA4__USDHC3_DATA4	0x17059
				MX6SX_PAD_SD3_DATA5__USDHC3_DATA5	0x17059
				MX6SX_PAD_SD3_DATA6__USDHC3_DATA6	0x17059
				MX6SX_PAD_SD3_DATA7__USDHC3_DATA7	0x17059
				MX6SX_PAD_KEY_COL0__GPIO2_IO_10		0x17059 /* CD */
				MX6SX_PAD_KEY_ROW0__GPIO2_IO_15		0x17059 /* WP */
			>;
		};

		pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
			fsl,pins = <
				MX6SX_PAD_SD3_CMD__USDHC3_CMD		0x170b9
				MX6SX_PAD_SD3_CLK__USDHC3_CLK		0x100b9
				MX6SX_PAD_SD3_DATA0__USDHC3_DATA0	0x170b9
				MX6SX_PAD_SD3_DATA1__USDHC3_DATA1	0x170b9
				MX6SX_PAD_SD3_DATA2__USDHC3_DATA2	0x170b9
				MX6SX_PAD_SD3_DATA3__USDHC3_DATA3	0x170b9
				MX6SX_PAD_SD3_DATA4__USDHC3_DATA4	0x170b9
				MX6SX_PAD_SD3_DATA5__USDHC3_DATA5	0x170b9
				MX6SX_PAD_SD3_DATA6__USDHC3_DATA6	0x170b9
				MX6SX_PAD_SD3_DATA7__USDHC3_DATA7	0x170b9
			>;
		};

		pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
			fsl,pins = <
				MX6SX_PAD_SD3_CMD__USDHC3_CMD		0x170f9
				MX6SX_PAD_SD3_CLK__USDHC3_CLK		0x100f9
				MX6SX_PAD_SD3_DATA0__USDHC3_DATA0	0x170f9
				MX6SX_PAD_SD3_DATA1__USDHC3_DATA1	0x170f9
				MX6SX_PAD_SD3_DATA2__USDHC3_DATA2	0x170f9
				MX6SX_PAD_SD3_DATA3__USDHC3_DATA3	0x170f9
				MX6SX_PAD_SD3_DATA4__USDHC3_DATA4	0x170f9
				MX6SX_PAD_SD3_DATA5__USDHC3_DATA5	0x170f9
				MX6SX_PAD_SD3_DATA6__USDHC3_DATA6	0x170f9
				MX6SX_PAD_SD3_DATA7__USDHC3_DATA7	0x170f9
			>;
		};

		pinctrl_usdhc4: usdhc4grp {
			fsl,pins = <
				MX6SX_PAD_SD4_CMD__USDHC4_CMD		0x17059
				MX6SX_PAD_SD4_CLK__USDHC4_CLK		0x10059
				MX6SX_PAD_SD4_DATA0__USDHC4_DATA0	0x17059
				MX6SX_PAD_SD4_DATA1__USDHC4_DATA1	0x17059
				MX6SX_PAD_SD4_DATA2__USDHC4_DATA2	0x17059
				MX6SX_PAD_SD4_DATA3__USDHC4_DATA3	0x17059
				MX6SX_PAD_SD4_DATA7__GPIO6_IO_21	0x17059 /* CD */
				MX6SX_PAD_SD4_DATA6__GPIO6_IO_20	0x17059 /* WP */
			>;
		};

		pinctrl_vcc_sd3: vccsd3grp {
			fsl,pins = <
				MX6SX_PAD_KEY_COL1__GPIO2_IO_11		0x17059
			>;
		};
	};
};