Alex Marginean | 1a5b098 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * (C) Copyright 2019 |
| 4 | * Alex Marginean, NXP |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <dm.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 9 | #include <log.h> |
Simon Glass | 9bc1564 | 2020-02-03 07:36:16 -0700 | [diff] [blame] | 10 | #include <malloc.h> |
Alex Marginean | 1a5b098 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 11 | #include <miiphy.h> |
| 12 | #include <dm/device-internal.h> |
Simon Glass | 9bc1564 | 2020-02-03 07:36:16 -0700 | [diff] [blame] | 13 | #include <dm/device_compat.h> |
Bin Meng | e0518f0 | 2021-03-14 20:14:47 +0800 | [diff] [blame] | 14 | #include <dm/of_extra.h> |
Alex Marginean | 1a5b098 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 15 | #include <dm/uclass-internal.h> |
Simon Glass | 9bc1564 | 2020-02-03 07:36:16 -0700 | [diff] [blame] | 16 | #include <linux/compat.h> |
Roger Quadros | b4ef5a1 | 2024-02-28 12:35:26 +0200 | [diff] [blame] | 17 | #include <linux/delay.h> |
| 18 | |
| 19 | #define DEFAULT_GPIO_RESET_DELAY 10 /* in microseconds */ |
Alex Marginean | 1a5b098 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 20 | |
| 21 | void dm_mdio_probe_devices(void) |
| 22 | { |
| 23 | struct udevice *it; |
| 24 | struct uclass *uc; |
| 25 | |
| 26 | uclass_get(UCLASS_MDIO, &uc); |
| 27 | uclass_foreach_dev(it, uc) { |
| 28 | device_probe(it); |
| 29 | } |
| 30 | } |
| 31 | |
| 32 | static int dm_mdio_post_bind(struct udevice *dev) |
| 33 | { |
Alex Marginean | 2e859ad | 2019-07-25 12:33:17 +0300 | [diff] [blame] | 34 | const char *dt_name; |
| 35 | |
| 36 | /* set a custom name for the MDIO device, if present in DT */ |
Simon Glass | a7ece58 | 2020-12-19 10:40:14 -0700 | [diff] [blame] | 37 | if (dev_has_ofnode(dev)) { |
| 38 | dt_name = dev_read_string(dev, "device-name"); |
Alex Marginean | 2e859ad | 2019-07-25 12:33:17 +0300 | [diff] [blame] | 39 | if (dt_name) { |
| 40 | debug("renaming dev %s to %s\n", dev->name, dt_name); |
| 41 | device_set_name(dev, dt_name); |
| 42 | } |
| 43 | } |
| 44 | |
Alex Marginean | 1a5b098 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 45 | /* |
| 46 | * MDIO command doesn't like spaces in names, don't allow them to keep |
| 47 | * it happy |
| 48 | */ |
| 49 | if (strchr(dev->name, ' ')) { |
| 50 | debug("\nError: MDIO device name \"%s\" has a space!\n", |
| 51 | dev->name); |
| 52 | return -EINVAL; |
| 53 | } |
| 54 | |
Tim Harvey | 973eb57 | 2022-11-30 09:42:44 -0800 | [diff] [blame] | 55 | #if CONFIG_IS_ENABLED(OF_REAL) |
| 56 | return dm_scan_fdt_dev(dev); |
| 57 | #else |
Alex Marginean | 1a5b098 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 58 | return 0; |
Tim Harvey | 973eb57 | 2022-11-30 09:42:44 -0800 | [diff] [blame] | 59 | #endif |
Alex Marginean | 1a5b098 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 60 | } |
| 61 | |
Marek Behún | 0e0651d | 2022-04-07 00:32:58 +0200 | [diff] [blame] | 62 | int dm_mdio_read(struct udevice *mdio_dev, int addr, int devad, int reg) |
| 63 | { |
| 64 | struct mdio_ops *ops = mdio_get_ops(mdio_dev); |
| 65 | |
| 66 | if (!ops->read) |
| 67 | return -ENOSYS; |
| 68 | |
| 69 | return ops->read(mdio_dev, addr, devad, reg); |
| 70 | } |
| 71 | |
| 72 | int dm_mdio_write(struct udevice *mdio_dev, int addr, int devad, int reg, |
| 73 | u16 val) |
| 74 | { |
| 75 | struct mdio_ops *ops = mdio_get_ops(mdio_dev); |
| 76 | |
| 77 | if (!ops->write) |
| 78 | return -ENOSYS; |
| 79 | |
| 80 | return ops->write(mdio_dev, addr, devad, reg, val); |
| 81 | } |
| 82 | |
| 83 | int dm_mdio_reset(struct udevice *mdio_dev) |
| 84 | { |
| 85 | struct mdio_ops *ops = mdio_get_ops(mdio_dev); |
Roger Quadros | b4ef5a1 | 2024-02-28 12:35:26 +0200 | [diff] [blame] | 86 | struct mdio_perdev_priv *pdata = dev_get_uclass_priv(mdio_dev); |
| 87 | struct mii_dev *mii_bus = pdata->mii_bus; |
| 88 | |
| 89 | if (CONFIG_IS_ENABLED(DM_GPIO) && dm_gpio_is_valid(&mii_bus->reset_gpiod)) { |
| 90 | dm_gpio_set_value(&mii_bus->reset_gpiod, 1); |
| 91 | udelay(mii_bus->reset_delay_us); |
| 92 | dm_gpio_set_value(&mii_bus->reset_gpiod, 0); |
| 93 | if (mii_bus->reset_post_delay_us > 0) |
| 94 | udelay(mii_bus->reset_post_delay_us); |
| 95 | } |
Marek Behún | 0e0651d | 2022-04-07 00:32:58 +0200 | [diff] [blame] | 96 | |
| 97 | if (!ops->reset) |
| 98 | return 0; |
| 99 | |
| 100 | return ops->reset(mdio_dev); |
| 101 | } |
| 102 | |
Alex Marginean | 1a5b098 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 103 | /* |
| 104 | * Following read/write/reset functions are registered with legacy MII code. |
| 105 | * These are called for PHY operations by upper layers and we further call the |
| 106 | * DM MDIO driver functions. |
| 107 | */ |
| 108 | static int mdio_read(struct mii_dev *mii_bus, int addr, int devad, int reg) |
| 109 | { |
Marek Behún | e4dedf2 | 2022-04-07 00:32:59 +0200 | [diff] [blame] | 110 | return dm_mdio_read(mii_bus->priv, addr, devad, reg); |
Alex Marginean | 1a5b098 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 111 | } |
| 112 | |
| 113 | static int mdio_write(struct mii_dev *mii_bus, int addr, int devad, int reg, |
| 114 | u16 val) |
| 115 | { |
Marek Behún | e4dedf2 | 2022-04-07 00:32:59 +0200 | [diff] [blame] | 116 | return dm_mdio_write(mii_bus->priv, addr, devad, reg, val); |
Alex Marginean | 1a5b098 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 117 | } |
| 118 | |
| 119 | static int mdio_reset(struct mii_dev *mii_bus) |
| 120 | { |
Marek Behún | e4dedf2 | 2022-04-07 00:32:59 +0200 | [diff] [blame] | 121 | return dm_mdio_reset(mii_bus->priv); |
Alex Marginean | 1a5b098 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 122 | } |
| 123 | |
| 124 | static int dm_mdio_post_probe(struct udevice *dev) |
| 125 | { |
| 126 | struct mdio_perdev_priv *pdata = dev_get_uclass_priv(dev); |
Roger Quadros | b4ef5a1 | 2024-02-28 12:35:26 +0200 | [diff] [blame] | 127 | struct mii_dev *mii_bus; |
| 128 | int ret; |
Alex Marginean | 1a5b098 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 129 | |
Roger Quadros | b4ef5a1 | 2024-02-28 12:35:26 +0200 | [diff] [blame] | 130 | mii_bus = mdio_alloc(); |
| 131 | if (!mii_bus) { |
| 132 | dev_err(dev, "couldn't allocate mii_bus\n"); |
| 133 | return -ENOMEM; |
| 134 | } |
| 135 | pdata->mii_bus = mii_bus; |
Alex Marginean | 1a5b098 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 136 | pdata->mii_bus->read = mdio_read; |
| 137 | pdata->mii_bus->write = mdio_write; |
| 138 | pdata->mii_bus->reset = mdio_reset; |
| 139 | pdata->mii_bus->priv = dev; |
Vladimir Oltean | 5404544 | 2021-09-27 14:22:00 +0300 | [diff] [blame] | 140 | strlcpy(pdata->mii_bus->name, dev->name, MDIO_NAME_LEN); |
Alex Marginean | 1a5b098 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 141 | |
Roger Quadros | b4ef5a1 | 2024-02-28 12:35:26 +0200 | [diff] [blame] | 142 | if (IS_ENABLED(CONFIG_DM_GPIO)) { |
| 143 | /* Get bus level PHY reset GPIO details */ |
| 144 | mii_bus->reset_delay_us = dev_read_u32_default(dev, "reset-delay-us", |
| 145 | DEFAULT_GPIO_RESET_DELAY); |
| 146 | mii_bus->reset_post_delay_us = dev_read_u32_default(dev, |
| 147 | "reset-post-delay-us", |
| 148 | 0); |
| 149 | ret = gpio_request_by_name(dev, "reset-gpios", 0, &mii_bus->reset_gpiod, |
| 150 | GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE); |
| 151 | if (ret && ret != -ENOENT) { |
| 152 | dev_err(dev, "couldn't get reset-gpios: %d\n", ret); |
| 153 | return ret; |
| 154 | } |
| 155 | } |
| 156 | |
Alex Marginean | 1a5b098 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 157 | return mdio_register(pdata->mii_bus); |
| 158 | } |
| 159 | |
| 160 | static int dm_mdio_pre_remove(struct udevice *dev) |
| 161 | { |
| 162 | struct mdio_perdev_priv *pdata = dev_get_uclass_priv(dev); |
Alex Marginean | 1a5b098 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 163 | |
Marek Behún | e4dedf2 | 2022-04-07 00:32:59 +0200 | [diff] [blame] | 164 | dm_mdio_reset(dev); |
Alex Marginean | 1a5b098 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 165 | mdio_unregister(pdata->mii_bus); |
| 166 | mdio_free(pdata->mii_bus); |
| 167 | |
| 168 | return 0; |
| 169 | } |
| 170 | |
Marek Behún | 1c1c37f | 2022-04-27 12:41:49 +0200 | [diff] [blame] | 171 | struct phy_device *dm_phy_find_by_ofnode(ofnode phynode) |
| 172 | { |
| 173 | struct mdio_perdev_priv *pdata; |
| 174 | struct udevice *mdiodev; |
| 175 | u32 phy_addr; |
| 176 | |
| 177 | if (ofnode_read_u32(phynode, "reg", &phy_addr)) |
| 178 | return NULL; |
| 179 | |
| 180 | if (uclass_get_device_by_ofnode(UCLASS_MDIO, |
| 181 | ofnode_get_parent(phynode), |
| 182 | &mdiodev)) |
| 183 | return NULL; |
| 184 | |
| 185 | if (device_probe(mdiodev)) |
| 186 | return NULL; |
| 187 | |
| 188 | pdata = dev_get_uclass_priv(mdiodev); |
| 189 | |
| 190 | return phy_find_by_mask(pdata->mii_bus, BIT(phy_addr)); |
| 191 | } |
| 192 | |
Alex Marginean | 6b3089e | 2019-11-25 17:15:11 +0200 | [diff] [blame] | 193 | struct phy_device *dm_mdio_phy_connect(struct udevice *mdiodev, int phyaddr, |
Alex Marginean | 1a5b098 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 194 | struct udevice *ethdev, |
| 195 | phy_interface_t interface) |
| 196 | { |
Alex Marginean | 6b3089e | 2019-11-25 17:15:11 +0200 | [diff] [blame] | 197 | struct mdio_perdev_priv *pdata = dev_get_uclass_priv(mdiodev); |
Alex Marginean | 1a5b098 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 198 | |
Alex Marginean | 6b3089e | 2019-11-25 17:15:11 +0200 | [diff] [blame] | 199 | if (device_probe(mdiodev)) |
| 200 | return NULL; |
Alex Marginean | 1a5b098 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 201 | |
Alex Marginean | 6b3089e | 2019-11-25 17:15:11 +0200 | [diff] [blame] | 202 | return phy_connect(pdata->mii_bus, phyaddr, ethdev, interface); |
Alex Marginean | 1a5b098 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 203 | } |
| 204 | |
Alex Marginean | cf64055 | 2019-11-25 17:15:12 +0200 | [diff] [blame] | 205 | static struct phy_device *dm_eth_connect_phy_handle(struct udevice *ethdev, |
| 206 | phy_interface_t interface) |
| 207 | { |
| 208 | u32 phy_addr; |
| 209 | struct udevice *mdiodev; |
| 210 | struct phy_device *phy; |
Vladimir Oltean | 6ca194a | 2021-03-14 20:14:48 +0800 | [diff] [blame] | 211 | ofnode phynode; |
Alex Marginean | cf64055 | 2019-11-25 17:15:12 +0200 | [diff] [blame] | 212 | |
Simon Glass | c3128da | 2023-02-22 09:33:51 -0700 | [diff] [blame] | 213 | if (IS_ENABLED(CONFIG_PHY_FIXED) && |
Vladimir Oltean | 6ca194a | 2021-03-14 20:14:48 +0800 | [diff] [blame] | 214 | ofnode_phy_is_fixed_link(dev_ofnode(ethdev), &phynode)) { |
| 215 | phy = phy_connect(NULL, 0, ethdev, interface); |
Rasmus Villemoes | e505164 | 2020-10-05 15:15:16 +0200 | [diff] [blame] | 216 | goto out; |
| 217 | } |
| 218 | |
Marek Behún | f4f1ddc | 2022-04-07 00:32:57 +0200 | [diff] [blame] | 219 | phynode = dev_get_phy_node(ethdev); |
| 220 | if (!ofnode_valid(phynode)) { |
Sean Anderson | 836cb5e | 2020-09-15 10:44:53 -0400 | [diff] [blame] | 221 | dev_dbg(ethdev, "can't find PHY node\n"); |
Alex Marginean | cf64055 | 2019-11-25 17:15:12 +0200 | [diff] [blame] | 222 | return NULL; |
| 223 | } |
| 224 | |
| 225 | /* |
| 226 | * reading 'reg' directly should be fine. This is a PHY node, the |
| 227 | * address is always size 1 and requires no translation |
| 228 | */ |
Marek Behún | f4f1ddc | 2022-04-07 00:32:57 +0200 | [diff] [blame] | 229 | if (ofnode_read_u32(phynode, "reg", &phy_addr)) { |
Alex Marginean | cf64055 | 2019-11-25 17:15:12 +0200 | [diff] [blame] | 230 | dev_dbg(ethdev, "missing reg property in phy node\n"); |
| 231 | return NULL; |
| 232 | } |
| 233 | |
| 234 | if (uclass_get_device_by_ofnode(UCLASS_MDIO, |
Marek Behún | f4f1ddc | 2022-04-07 00:32:57 +0200 | [diff] [blame] | 235 | ofnode_get_parent(phynode), |
Alex Marginean | cf64055 | 2019-11-25 17:15:12 +0200 | [diff] [blame] | 236 | &mdiodev)) { |
Sean Anderson | 836cb5e | 2020-09-15 10:44:53 -0400 | [diff] [blame] | 237 | dev_dbg(ethdev, "can't find MDIO bus for node %s\n", |
Marek Behún | f4f1ddc | 2022-04-07 00:32:57 +0200 | [diff] [blame] | 238 | ofnode_get_name(ofnode_get_parent(phynode))); |
Alex Marginean | cf64055 | 2019-11-25 17:15:12 +0200 | [diff] [blame] | 239 | return NULL; |
| 240 | } |
| 241 | |
| 242 | phy = dm_mdio_phy_connect(mdiodev, phy_addr, ethdev, interface); |
| 243 | |
Rasmus Villemoes | e505164 | 2020-10-05 15:15:16 +0200 | [diff] [blame] | 244 | out: |
Alex Marginean | cf64055 | 2019-11-25 17:15:12 +0200 | [diff] [blame] | 245 | if (phy) |
Marek Behún | f4f1ddc | 2022-04-07 00:32:57 +0200 | [diff] [blame] | 246 | phy->node = phynode; |
Alex Marginean | cf64055 | 2019-11-25 17:15:12 +0200 | [diff] [blame] | 247 | |
| 248 | return phy; |
| 249 | } |
| 250 | |
| 251 | /* Connect to a PHY linked in eth DT node */ |
| 252 | struct phy_device *dm_eth_phy_connect(struct udevice *ethdev) |
| 253 | { |
Alex Marginean | cf64055 | 2019-11-25 17:15:12 +0200 | [diff] [blame] | 254 | phy_interface_t interface; |
| 255 | struct phy_device *phy; |
Alex Marginean | cf64055 | 2019-11-25 17:15:12 +0200 | [diff] [blame] | 256 | |
Simon Glass | a7ece58 | 2020-12-19 10:40:14 -0700 | [diff] [blame] | 257 | if (!dev_has_ofnode(ethdev)) { |
Alex Marginean | cf64055 | 2019-11-25 17:15:12 +0200 | [diff] [blame] | 258 | debug("%s: supplied eth dev has no DT node!\n", ethdev->name); |
| 259 | return NULL; |
| 260 | } |
| 261 | |
Marek Behún | bc19477 | 2022-04-07 00:33:01 +0200 | [diff] [blame] | 262 | interface = dev_read_phy_mode(ethdev); |
Marek Behún | 48631e4 | 2022-04-07 00:33:03 +0200 | [diff] [blame] | 263 | if (interface == PHY_INTERFACE_MODE_NA) |
| 264 | dev_dbg(ethdev, "can't find interface mode, default to NA\n"); |
Alex Marginean | cf64055 | 2019-11-25 17:15:12 +0200 | [diff] [blame] | 265 | |
| 266 | phy = dm_eth_connect_phy_handle(ethdev, interface); |
| 267 | |
| 268 | if (!phy) |
| 269 | return NULL; |
| 270 | |
| 271 | phy->interface = interface; |
| 272 | |
| 273 | return phy; |
| 274 | } |
| 275 | |
Alex Marginean | 1a5b098 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 276 | UCLASS_DRIVER(mdio) = { |
| 277 | .id = UCLASS_MDIO, |
| 278 | .name = "mdio", |
| 279 | .post_bind = dm_mdio_post_bind, |
| 280 | .post_probe = dm_mdio_post_probe, |
| 281 | .pre_remove = dm_mdio_pre_remove, |
Simon Glass | 8a2b47f | 2020-12-03 16:55:17 -0700 | [diff] [blame] | 282 | .per_device_auto = sizeof(struct mdio_perdev_priv), |
Alex Marginean | 1a5b098 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 283 | }; |