Wolfgang Denk | 52744b4 | 2013-07-28 22:12:45 +0200 | [diff] [blame] | 1 | /* |
Wolfgang Denk | 815c967 | 2013-09-17 11:24:06 +0200 | [diff] [blame] | 2 | * SPDX-License-Identifier: GPL-2.0 IBM-pibs |
Wolfgang Denk | 52744b4 | 2013-07-28 22:12:45 +0200 | [diff] [blame] | 3 | */ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 4 | /* |
| 5 | * Adapted for PIP405 03.07.01 |
| 6 | * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch |
| 7 | * |
| 8 | * TODO: Clean-up |
| 9 | */ |
| 10 | |
| 11 | #include <common.h> |
| 12 | #include <pci.h> |
| 13 | #include "isa.h" |
| 14 | |
| 15 | #ifdef CONFIG_405GP |
| 16 | #ifdef CONFIG_PCI |
| 17 | |
Wolfgang Denk | 6405a15 | 2006-03-31 18:32:53 +0200 | [diff] [blame] | 18 | DECLARE_GLOBAL_DATA_PTR; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 19 | |
| 20 | #include "piix4_pci.h" |
| 21 | #include "pci_parts.h" |
| 22 | |
Chakra Divi | a1fef71 | 2017-06-05 23:09:30 +0530 | [diff] [blame] | 23 | void pci_405gp_init(struct pci_controller *hose); |
| 24 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 25 | void pci_pip405_write_regs(struct pci_controller *hose, pci_dev_t dev, |
Chakra Divi | a1fef71 | 2017-06-05 23:09:30 +0530 | [diff] [blame] | 26 | struct pci_config_table *entry) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 27 | { |
| 28 | struct pci_pip405_config_entry *table; |
| 29 | int i; |
| 30 | |
Chakra Divi | a1fef71 | 2017-06-05 23:09:30 +0530 | [diff] [blame] | 31 | table = (struct pci_pip405_config_entry *)entry->priv[0]; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 32 | |
Chakra Divi | a1fef71 | 2017-06-05 23:09:30 +0530 | [diff] [blame] | 33 | for (i = 0; table[i].width; i++) { |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 34 | #ifdef DEBUG |
| 35 | printf("Reg 0x%02X Value 0x%08lX Width %02d written\n", |
| 36 | table[i].index, table[i].val, table[i].width); |
| 37 | #endif |
| 38 | |
Chakra Divi | a1fef71 | 2017-06-05 23:09:30 +0530 | [diff] [blame] | 39 | switch (table[i].width) { |
| 40 | case 1: |
| 41 | pci_hose_write_config_byte(hose, dev, |
| 42 | table[i].index, table[i].val); |
| 43 | break; |
| 44 | case 2: |
| 45 | pci_hose_write_config_word(hose, dev, |
| 46 | table[i].index, table[i].val); |
| 47 | break; |
| 48 | case 4: |
| 49 | pci_hose_write_config_dword(hose, dev, |
| 50 | table[i].index, table[i].val); |
| 51 | break; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 52 | } |
| 53 | } |
| 54 | } |
| 55 | |
| 56 | |
| 57 | static void pci_pip405_fixup_irq(struct pci_controller *hose, pci_dev_t dev) |
| 58 | { |
| 59 | unsigned char int_line = 0xff; |
wdenk | b02744a | 2003-04-05 00:53:31 +0000 | [diff] [blame] | 60 | unsigned char pin; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 61 | /* |
| 62 | * Write pci interrupt line register |
| 63 | */ |
Chakra Divi | a1fef71 | 2017-06-05 23:09:30 +0530 | [diff] [blame] | 64 | if (PCI_DEV(dev) == 0) /* Device0 = PPC405 -> skip */ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 65 | return; |
wdenk | b02744a | 2003-04-05 00:53:31 +0000 | [diff] [blame] | 66 | pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_PIN, &pin); |
| 67 | if ((pin == 0) || (pin > 4)) |
Chakra Divi | a1fef71 | 2017-06-05 23:09:30 +0530 | [diff] [blame] | 68 | return; |
wdenk | b02744a | 2003-04-05 00:53:31 +0000 | [diff] [blame] | 69 | |
| 70 | int_line = ((PCI_DEV(dev) + (pin-1) + 10) % 4) + 28; |
| 71 | pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, int_line); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 72 | #ifdef DEBUG |
wdenk | b02744a | 2003-04-05 00:53:31 +0000 | [diff] [blame] | 73 | printf("Fixup IRQ: dev %d (%x) int line %d 0x%x\n", |
Chakra Divi | a1fef71 | 2017-06-05 23:09:30 +0530 | [diff] [blame] | 74 | PCI_DEV(dev), dev, int_line, int_line); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 75 | #endif |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 76 | } |
| 77 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 78 | |
| 79 | static struct pci_controller hose = { |
Chakra Divi | a1fef71 | 2017-06-05 23:09:30 +0530 | [diff] [blame] | 80 | config_table: pci_pip405_config_table, |
| 81 | fixup_irq : pci_pip405_fixup_irq, |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 82 | }; |
| 83 | |
wdenk | b02744a | 2003-04-05 00:53:31 +0000 | [diff] [blame] | 84 | |
stroese | f5dd410 | 2003-02-14 11:21:23 +0000 | [diff] [blame] | 85 | void pci_init_board(void) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 86 | { |
| 87 | /*we want the ptrs to RAM not flash (ie don't use init list)*/ |
| 88 | hose.fixup_irq = pci_pip405_fixup_irq; |
| 89 | hose.config_table = pci_pip405_config_table; |
wdenk | b02744a | 2003-04-05 00:53:31 +0000 | [diff] [blame] | 90 | #ifdef DEBUG |
Chakra Divi | a1fef71 | 2017-06-05 23:09:30 +0530 | [diff] [blame] | 91 | printf("Init PCI: fixup_irq=%p config_table=%p hose=%p\n", |
| 92 | pci_pip405_fixup_irq, pci_pip405_config_table, hose); |
wdenk | b02744a | 2003-04-05 00:53:31 +0000 | [diff] [blame] | 93 | #endif |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 94 | pci_405gp_init(&hose); |
| 95 | } |
| 96 | |
| 97 | #endif /* CONFIG_PCI */ |
| 98 | #endif /* CONFIG_405GP */ |