blob: 26a593418938da72e3dcc43ec77ed45d43262d9a [file] [log] [blame]
Alexey Brodkin3a59d912014-02-04 12:56:14 +04001/*
2 * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <asm-offsets.h>
8#include <config.h>
Alexey Brodkin7a5f30d2015-02-19 18:40:58 +03009#include <linux/linkage.h>
Alexey Brodkin3a59d912014-02-04 12:56:14 +040010#include <asm/arcregs.h>
11
Alexey Brodkin7a5f30d2015-02-19 18:40:58 +030012ENTRY(_start)
Igor Guryanov4fec6aa2014-12-24 17:17:11 +030013 /* Setup interrupt vector base that matches "__text_start" */
14 sr __ivt_start, [ARC_AUX_INTR_VEC_BASE]
15
Alexey Brodkin9f916ee2015-05-18 16:56:26 +030016 ; Disable/enable I-cache according to configuration
17 lr r5, [ARC_BCR_IC_BUILD]
18 breq r5, 0, 1f ; I$ doesn't exist
19 lr r5, [ARC_AUX_IC_CTRL]
20#ifndef CONFIG_SYS_ICACHE_OFF
21 bclr r5, r5, 0 ; 0 - Enable, 1 is Disable
22#else
23 bset r5, r5, 0 ; I$ exists, but is not used
24#endif
25 sr r5, [ARC_AUX_IC_CTRL]
26
271:
28 ; Disable/enable D-cache according to configuration
29 lr r5, [ARC_BCR_DC_BUILD]
30 breq r5, 0, 1f ; D$ doesn't exist
31 lr r5, [ARC_AUX_DC_CTRL]
32 bclr r5, r5, 6 ; Invalidate (discard w/o wback)
33#ifndef CONFIG_SYS_DCACHE_OFF
34 bclr r5, r5, 0 ; Enable (+Inv)
35#else
36 bset r5, r5, 0 ; Disable (+Inv)
37#endif
38 sr r5, [ARC_AUX_DC_CTRL]
Igor Guryanov4fec6aa2014-12-24 17:17:11 +030039
Alexey Brodkin9f916ee2015-05-18 16:56:26 +0300401:
Alexey Brodkin275583e2015-03-30 13:36:04 +030041#ifdef CONFIG_ISA_ARCV2
Alexey Brodkin9f916ee2015-05-18 16:56:26 +030042 ; Disable System-Level Cache (SLC)
43 lr r5, [ARC_BCR_SLC]
44 breq r5, 0, 1f ; SLC doesn't exist
45 lr r5, [ARC_AUX_SLC_CTRL]
46 bclr r5, r5, 6 ; Invalidate (discard w/o wback)
47 bclr r5, r5, 0 ; Enable (+Inv)
48 sr r5, [ARC_AUX_SLC_CTRL]
49
501:
Alexey Brodkin275583e2015-03-30 13:36:04 +030051#endif
Alexey Brodkin9f916ee2015-05-18 16:56:26 +030052
53 /* Setup stack- and frame-pointers */
54 mov %sp, CONFIG_SYS_INIT_SP_ADDR
55 mov %fp, %sp
Igor Guryanov4fec6aa2014-12-24 17:17:11 +030056
Alexey Brodkin7f188f22015-02-25 18:10:18 +030057 /* Allocate and zero GD, update SP */
58 mov %r0, %sp
59 bl board_init_f_mem
60
61 /* Update stack- and frame-pointers */
62 mov %sp, %r0
63 mov %fp, %sp
64
Igor Guryanov4fec6aa2014-12-24 17:17:11 +030065 /* Zero the one and only argument of "board_init_f" */
66 mov_s %r0, 0
67 j board_init_f
Alexey Brodkin7a5f30d2015-02-19 18:40:58 +030068ENDPROC(_start)
Igor Guryanov4fec6aa2014-12-24 17:17:11 +030069
Alexey Brodkin3a59d912014-02-04 12:56:14 +040070/*
Alexey Brodkin913e9f02015-02-24 19:40:36 +030071 * void board_init_f_r_trampoline(stack-pointer address)
Alexey Brodkin3a59d912014-02-04 12:56:14 +040072 *
73 * This "function" does not return, instead it continues in RAM
74 * after relocating the monitor code.
75 *
Alexey Brodkin913e9f02015-02-24 19:40:36 +030076 * r0 = new stack-pointer
Alexey Brodkin3a59d912014-02-04 12:56:14 +040077 */
Alexey Brodkin913e9f02015-02-24 19:40:36 +030078ENTRY(board_init_f_r_trampoline)
79 /* Set up the stack- and frame-pointers */
80 mov %sp, %r0
Alexey Brodkin3a59d912014-02-04 12:56:14 +040081 mov %fp, %sp
82
Alexey Brodkin913e9f02015-02-24 19:40:36 +030083 /* Update position of intterupt vector table */
84 lr %r0, [ARC_AUX_INTR_VEC_BASE]
85 ld %r1, [%r25, GD_RELOC_OFF]
86 add %r0, %r0, %r1
87 sr %r0, [ARC_AUX_INTR_VEC_BASE]
Alexey Brodkin3a59d912014-02-04 12:56:14 +040088
Alexey Brodkin913e9f02015-02-24 19:40:36 +030089 /* Re-enter U-Boot by calling board_init_f_r */
90 j board_init_f_r
91ENDPROC(board_init_f_r_trampoline)