blob: b1ae02fcab8abd064b6a0000c017c6cc0a58f438 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Daniel Schwierzecke8d31552016-01-09 18:34:14 +01002/*
3 * Copyright (C) 1994 - 1999, 2000, 01, 06 Ralf Baechle
4 * Copyright (C) 1995, 1996 Paul M. Antoine
5 * Copyright (C) 1998 Ulf Carlsson
6 * Copyright (C) 1999 Silicon Graphics, Inc.
7 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
8 * Copyright (C) 2002, 2003, 2004, 2005, 2007 Maciej W. Rozycki
9 * Copyright (C) 2000, 2001, 2012 MIPS Technologies, Inc. All rights reserved.
10 * Copyright (C) 2014, Imagination Technologies Ltd.
Daniel Schwierzecke8d31552016-01-09 18:34:14 +010011 */
12
13#include <common.h>
Simon Glass6b9f0102020-05-10 11:40:06 -060014#include <asm/ptrace.h>
Simon Glass63334482019-11-14 12:57:39 -070015#include <cpu_func.h>
Simon Glassf11478f2019-12-28 10:45:07 -070016#include <hang.h>
Simon Glass537ecc92019-11-14 12:57:48 -070017#include <init.h>
Simon Glass0f2af882020-05-10 11:40:05 -060018#include <log.h>
Daniel Schwierzecke8d31552016-01-09 18:34:14 +010019#include <asm/mipsregs.h>
20#include <asm/addrspace.h>
21#include <asm/system.h>
22
23DECLARE_GLOBAL_DATA_PTR;
24
developer5cbbd712020-04-21 09:28:25 +020025static unsigned long saved_ebase;
26
Daniel Schwierzecke8d31552016-01-09 18:34:14 +010027static void show_regs(const struct pt_regs *regs)
28{
29 const int field = 2 * sizeof(unsigned long);
30 unsigned int cause = regs->cp0_cause;
31 unsigned int exccode;
32 int i;
33
34 /*
35 * Saved main processor registers
36 */
37 for (i = 0; i < 32; ) {
38 if ((i % 4) == 0)
39 printf("$%2d :", i);
40 if (i == 0)
41 printf(" %0*lx", field, 0UL);
42 else if (i == 26 || i == 27)
43 printf(" %*s", field, "");
44 else
45 printf(" %0*lx", field, regs->regs[i]);
46
47 i++;
48 if ((i % 4) == 0)
49 puts("\n");
50 }
51
52 printf("Hi : %0*lx\n", field, regs->hi);
53 printf("Lo : %0*lx\n", field, regs->lo);
54
55 /*
56 * Saved cp0 registers
57 */
58 printf("epc : %0*lx (text %0*lx)\n", field, regs->cp0_epc,
59 field, regs->cp0_epc - gd->reloc_off);
60 printf("ra : %0*lx (text %0*lx)\n", field, regs->regs[31],
61 field, regs->regs[31] - gd->reloc_off);
62
63 printf("Status: %08x\n", (uint32_t) regs->cp0_status);
64
65 exccode = (cause & CAUSEF_EXCCODE) >> CAUSEB_EXCCODE;
66 printf("Cause : %08x (ExcCode %02x)\n", cause, exccode);
67
68 if (1 <= exccode && exccode <= 5)
69 printf("BadVA : %0*lx\n", field, regs->cp0_badvaddr);
70
71 printf("PrId : %08x\n", read_c0_prid());
72}
73
74void do_reserved(const struct pt_regs *regs)
75{
76 puts("\nOoops:\n");
77 show_regs(regs);
78 hang();
79}
80
81void do_ejtag_debug(const struct pt_regs *regs)
82{
83 const int field = 2 * sizeof(unsigned long);
84 unsigned long depc;
85 unsigned int debug;
86
87 depc = read_c0_depc();
88 debug = read_c0_debug();
89
90 printf("SDBBP EJTAG debug exception: c0_depc = %0*lx, DEBUG = %08x\n",
91 field, depc, debug);
92}
93
94static void set_handler(unsigned long offset, void *addr, unsigned long size)
95{
96 unsigned long ebase = gd->irq_sp;
97
98 memcpy((void *)(ebase + offset), addr, size);
99 flush_cache(ebase + offset, size);
100}
101
102void trap_init(ulong reloc_addr)
103{
104 unsigned long ebase = gd->irq_sp;
105
106 set_handler(0x180, &except_vec3_generic, 0x80);
107 set_handler(0x280, &except_vec_ejtag_debug, 0x80);
108
developer5cbbd712020-04-21 09:28:25 +0200109 saved_ebase = read_c0_ebase() & 0xfffff000;
110
Daniel Schwierzecke8d31552016-01-09 18:34:14 +0100111 write_c0_ebase(ebase);
112 clear_c0_status(ST0_BEV);
113 execution_hazard_barrier();
114}
developer5cbbd712020-04-21 09:28:25 +0200115
116void trap_restore(void)
117{
118 set_c0_status(ST0_BEV);
119 execution_hazard_barrier();
120
121#ifdef CONFIG_OVERRIDE_EXCEPTION_VECTOR_BASE
122 write_c0_ebase(CONFIG_NEW_EXCEPTION_VECTOR_BASE & 0xfffff000);
123#else
124 write_c0_ebase(saved_ebase);
125#endif
126
127 clear_c0_status(ST0_BEV);
128 execution_hazard_barrier();
129}