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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Thierry Reding52d6c122012-06-04 20:02:30 +00002/*
3 * (C) Copyright 2010,2011
4 * NVIDIA Corporation <www.nvidia.com>
5 * (C) Copyright 2011-2012
6 * Avionic Design GmbH <www.avionic-design.de>
Thierry Reding52d6c122012-06-04 20:02:30 +00007 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
Allen Martin55d98a12012-08-31 08:30:00 +000012#include "tegra20-common.h"
Thierry Reding52d6c122012-06-04 20:02:30 +000013
Thierry Reding52d6c122012-06-04 20:02:30 +000014/* High-level configuration options */
Tom Warren22562a42012-09-04 17:00:24 -070015#define CONFIG_TEGRA_BOARD_STRING "Avionic Design Tamonten Evaluation Carrier"
Thierry Reding52d6c122012-06-04 20:02:30 +000016
17/* Board-specific serial config */
Tom Warren22562a42012-09-04 17:00:24 -070018#define CONFIG_TEGRA_ENABLE_UARTD /* UARTD: debug UART */
Thierry Reding52d6c122012-06-04 20:02:30 +000019#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
20
Thierry Reding66d807f2012-07-30 20:21:56 +000021/* NAND support */
Thierry Reding66d807f2012-07-30 20:21:56 +000022#define CONFIG_TEGRA_NAND
23#define CONFIG_SYS_MAX_NAND_DEVICE 1
Thierry Reding66d807f2012-07-30 20:21:56 +000024
25/* Environment in NAND, aligned to start of last sector */
Thierry Reding66d807f2012-07-30 20:21:56 +000026#define CONFIG_ENV_OFFSET (SZ_512M - SZ_128K) /* 128K sectors */
27
Tom Warren22562a42012-09-04 17:00:24 -070028#include "tegra-common-post.h"
Allen Martina1046812012-08-31 08:30:03 +000029
Thierry Reding52d6c122012-06-04 20:02:30 +000030#endif /* __CONFIG_H */