Stefano Babic | 17b6037 | 2016-06-08 10:50:20 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) Stefano Babic <sbabic@denx.de> |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | |
| 8 | #ifndef __PCM058_CONFIG_H |
| 9 | #define __PCM058_CONFIG_H |
| 10 | |
| 11 | #include <config_distro_defaults.h> |
| 12 | |
| 13 | #ifdef CONFIG_SPL |
| 14 | #define CONFIG_SPL_LIBCOMMON_SUPPORT |
| 15 | #define CONFIG_SPL_YMODEM_SUPPORT |
| 16 | #define CONFIG_SPL_MMC_SUPPORT |
| 17 | #define CONFIG_SPL_DMA_SUPPORT |
| 18 | #define CONFIG_SPL_SPI_SUPPORT |
| 19 | #define CONFIG_SPL_SPI_FLASH_SUPPORT |
| 20 | #define CONFIG_SPL_SPI_LOAD |
| 21 | #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) |
| 22 | #include "imx6_spl.h" |
| 23 | #endif |
| 24 | |
| 25 | #include "mx6_common.h" |
| 26 | |
| 27 | /* Thermal */ |
| 28 | #define CONFIG_IMX_THERMAL |
| 29 | |
| 30 | /* Serial */ |
| 31 | #define CONFIG_MXC_UART |
| 32 | #define CONFIG_MXC_UART_BASE UART2_BASE |
| 33 | #define CONFIG_CONSOLE_DEV "ttymxc1" |
| 34 | |
| 35 | #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) |
| 36 | |
| 37 | /* Early setup */ |
| 38 | #define CONFIG_BOARD_EARLY_INIT_F |
| 39 | #define CONFIG_BOARD_LATE_INIT |
| 40 | #define CONFIG_DISPLAY_BOARDINFO_LATE |
| 41 | |
| 42 | |
| 43 | /* Size of malloc() pool */ |
| 44 | #define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M) |
| 45 | |
| 46 | /* Ethernet */ |
| 47 | #define CONFIG_FEC_MXC |
| 48 | #define CONFIG_MII |
| 49 | #define IMX_FEC_BASE ENET_BASE_ADDR |
| 50 | #define CONFIG_FEC_XCV_TYPE RGMII |
| 51 | #define CONFIG_ETHPRIME "FEC" |
| 52 | #define CONFIG_FEC_MXC_PHYADDR 3 |
| 53 | |
| 54 | #define CONFIG_PHYLIB |
| 55 | #define CONFIG_PHY_MICREL |
| 56 | #define CONFIG_PHY_KSZ9031 |
| 57 | |
| 58 | /* SPI Flash */ |
| 59 | #define CONFIG_MXC_SPI |
| 60 | #define CONFIG_SF_DEFAULT_BUS 0 |
| 61 | #define CONFIG_SF_DEFAULT_CS 0 |
| 62 | #define CONFIG_SF_DEFAULT_SPEED 20000000 |
| 63 | #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 |
| 64 | |
| 65 | /* I2C Configs */ |
| 66 | #define CONFIG_SYS_I2C |
| 67 | #define CONFIG_SYS_I2C_MXC |
| 68 | #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 2 */ |
| 69 | #define CONFIG_SYS_I2C_SPEED 100000 |
| 70 | |
| 71 | #ifndef CONFIG_SPL_BUILD |
| 72 | #define CONFIG_CMD_NAND |
| 73 | /* Enable NAND support */ |
| 74 | #define CONFIG_CMD_NAND_TRIMFFS |
| 75 | #define CONFIG_NAND_MXS |
| 76 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 77 | #define CONFIG_SYS_NAND_BASE 0x40000000 |
| 78 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE |
| 79 | #define CONFIG_SYS_NAND_ONFI_DETECTION |
| 80 | #endif |
| 81 | |
| 82 | /* DMA stuff, needed for GPMI/MXS NAND support */ |
| 83 | #define CONFIG_APBH_DMA |
| 84 | #define CONFIG_APBH_DMA_BURST |
| 85 | #define CONFIG_APBH_DMA_BURST8 |
| 86 | |
| 87 | /* Filesystem support */ |
| 88 | #define CONFIG_LZO |
| 89 | #define CONFIG_CMD_UBIFS |
| 90 | #define CONFIG_CMD_MTDPARTS |
| 91 | #define CONFIG_MTD_PARTITIONS |
| 92 | #define CONFIG_MTD_DEVICE |
| 93 | #define MTDIDS_DEFAULT "nand0=nand" |
| 94 | #define MTDPARTS_DEFAULT "mtdparts=nand:16m(uboot),1m(env),-(rootfs)" |
| 95 | |
| 96 | /* Various command support */ |
| 97 | #define CONFIG_CMD_BMODE /* set eFUSE shadow for a boot dev and reset */ |
| 98 | #define CONFIG_CMD_HDMIDETECT /* detect HDMI output device */ |
| 99 | #define CONFIG_CMD_GSC |
| 100 | #define CONFIG_CMD_EECONFIG /* Gateworks EEPROM config cmd */ |
| 101 | #define CONFIG_CMD_UBI |
| 102 | #define CONFIG_RBTREE |
| 103 | |
| 104 | /* Physical Memory Map */ |
| 105 | #define CONFIG_NR_DRAM_BANKS 1 |
| 106 | #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR |
| 107 | |
| 108 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM |
| 109 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR |
| 110 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE |
| 111 | |
| 112 | #define CONFIG_SYS_INIT_SP_OFFSET \ |
| 113 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
| 114 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| 115 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
| 116 | |
| 117 | /* MMC Configs */ |
| 118 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
| 119 | #define CONFIG_SYS_FSL_USDHC_NUM 1 |
| 120 | |
| 121 | /* Environment organization */ |
| 122 | #define CONFIG_ENV_IS_IN_SPI_FLASH |
| 123 | #define CONFIG_ENV_SIZE (16 * 1024) |
| 124 | #define CONFIG_ENV_OFFSET (1024 * SZ_1K) |
| 125 | #define CONFIG_ENV_SECT_SIZE (64 * SZ_1K) |
| 126 | #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS |
| 127 | #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS |
| 128 | #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE |
| 129 | #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED |
| 130 | #define CONFIG_SYS_REDUNDAND_ENVIRONMENT |
| 131 | #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ |
| 132 | CONFIG_ENV_SECT_SIZE) |
| 133 | #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE |
| 134 | |
| 135 | #ifdef CONFIG_ENV_IS_IN_NAND |
| 136 | #define CONFIG_ENV_OFFSET (0x1E0000) |
| 137 | #define CONFIG_ENV_SECT_SIZE (128 * SZ_1K) |
| 138 | #endif |
| 139 | |
| 140 | #endif |