Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: BSD-3-Clause */ |
Kever Yang | 6e79a91 | 2017-05-05 11:47:45 +0800 | [diff] [blame] | 2 | /* |
| 3 | * This is from the ARM TF Project, |
Peter Robinson | 32d26c7 | 2024-10-02 19:08:49 +0100 | [diff] [blame] | 4 | * Repository: https://github.com/TrustedFirmware-A/trusted-firmware-a.git |
Kever Yang | 6e79a91 | 2017-05-05 11:47:45 +0800 | [diff] [blame] | 5 | * File: include/common/bl_common.h |
| 6 | * Portions copyright (c) 2013-2016, ARM Limited and Contributors. All rights |
| 7 | * reserved. |
| 8 | * Copyright (C) 2016-2017 Rockchip Electronic Co.,Ltd |
Kever Yang | 6e79a91 | 2017-05-05 11:47:45 +0800 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | #ifndef __BL_COMMON_H__ |
| 12 | #define __BL_COMMON_H__ |
| 13 | |
| 14 | #define ATF_PARAM_EP 0x01 |
| 15 | #define ATF_PARAM_IMAGE_BINARY 0x02 |
| 16 | #define ATF_PARAM_BL31 0x03 |
Michael Walle | afaf6ea | 2020-11-18 17:45:58 +0100 | [diff] [blame] | 17 | #define ATF_PARAM_BL_PARAMS 0x05 |
Kever Yang | 6e79a91 | 2017-05-05 11:47:45 +0800 | [diff] [blame] | 18 | |
| 19 | #define ATF_VERSION_1 0x01 |
Michael Walle | afaf6ea | 2020-11-18 17:45:58 +0100 | [diff] [blame] | 20 | #define ATF_VERSION_2 0x02 |
| 21 | |
| 22 | #define ATF_BL31_IMAGE_ID 0x03 |
| 23 | #define ATF_BL32_IMAGE_ID 0x04 |
| 24 | #define ATF_BL33_IMAGE_ID 0x05 |
Kever Yang | 6e79a91 | 2017-05-05 11:47:45 +0800 | [diff] [blame] | 25 | |
| 26 | #define ATF_EP_SECURE 0x0 |
| 27 | #define ATF_EP_NON_SECURE 0x1 |
| 28 | |
| 29 | #define SET_PARAM_HEAD(_p, _type, _ver, _attr) do { \ |
| 30 | (_p)->h.type = (uint8_t)(_type); \ |
| 31 | (_p)->h.version = (uint8_t)(_ver); \ |
| 32 | (_p)->h.size = (uint16_t)sizeof(*_p); \ |
| 33 | (_p)->h.attr = (uint32_t)(_attr) ; \ |
| 34 | } while (0) |
| 35 | |
| 36 | #define MODE_RW_SHIFT 0x4 |
| 37 | #define MODE_RW_MASK 0x1 |
| 38 | #define MODE_RW_64 0x0 |
| 39 | #define MODE_RW_32 0x1 |
| 40 | |
| 41 | #define MODE_EL_SHIFT 0x2 |
| 42 | #define MODE_EL_MASK 0x3 |
| 43 | #define MODE_EL3 0x3 |
| 44 | #define MODE_EL2 0x2 |
| 45 | #define MODE_EL1 0x1 |
| 46 | #define MODE_EL0 0x0 |
| 47 | |
| 48 | #define MODE_SP_SHIFT 0x0 |
| 49 | #define MODE_SP_MASK 0x1 |
| 50 | #define MODE_SP_EL0 0x0 |
| 51 | #define MODE_SP_ELX 0x1 |
| 52 | |
| 53 | #define SPSR_DAIF_SHIFT 6 |
| 54 | #define SPSR_DAIF_MASK 0x0f |
| 55 | |
| 56 | #define SPSR_64(el, sp, daif) \ |
| 57 | (MODE_RW_64 << MODE_RW_SHIFT | \ |
| 58 | ((el) & MODE_EL_MASK) << MODE_EL_SHIFT | \ |
| 59 | ((sp) & MODE_SP_MASK) << MODE_SP_SHIFT | \ |
| 60 | ((daif) & SPSR_DAIF_MASK) << SPSR_DAIF_SHIFT) |
| 61 | |
| 62 | #define SPSR_FIQ (1 << 6) |
| 63 | #define SPSR_IRQ (1 << 7) |
| 64 | #define SPSR_SERROR (1 << 8) |
| 65 | #define SPSR_DEBUG (1 << 9) |
| 66 | #define SPSR_EXCEPTION_MASK (SPSR_FIQ | SPSR_IRQ | SPSR_SERROR | SPSR_DEBUG) |
| 67 | |
| 68 | #define DAIF_FIQ_BIT (1<<0) |
| 69 | #define DAIF_IRQ_BIT (1<<1) |
| 70 | #define DAIF_ABT_BIT (1<<2) |
| 71 | #define DAIF_DBG_BIT (1<<3) |
| 72 | #define DISABLE_ALL_EXECPTIONS \ |
| 73 | (DAIF_FIQ_BIT | DAIF_IRQ_BIT | DAIF_ABT_BIT | DAIF_DBG_BIT) |
| 74 | |
| 75 | #ifndef __ASSEMBLY__ |
| 76 | |
Tom Rini | dec7ea0 | 2024-05-20 13:35:03 -0600 | [diff] [blame] | 77 | #include <linux/types.h> |
| 78 | |
Kever Yang | 6e79a91 | 2017-05-05 11:47:45 +0800 | [diff] [blame] | 79 | /******************************************************************************* |
| 80 | * Structure used for telling the next BL how much of a particular type of |
| 81 | * memory is available for its use and how much is already used. |
| 82 | ******************************************************************************/ |
| 83 | struct aapcs64_params { |
| 84 | unsigned long arg0; |
| 85 | unsigned long arg1; |
| 86 | unsigned long arg2; |
| 87 | unsigned long arg3; |
| 88 | unsigned long arg4; |
| 89 | unsigned long arg5; |
| 90 | unsigned long arg6; |
| 91 | unsigned long arg7; |
| 92 | }; |
| 93 | |
| 94 | /*************************************************************************** |
| 95 | * This structure provides version information and the size of the |
| 96 | * structure, attributes for the structure it represents |
| 97 | ***************************************************************************/ |
| 98 | struct param_header { |
| 99 | uint8_t type; /* type of the structure */ |
| 100 | uint8_t version; /* version of this structure */ |
| 101 | uint16_t size; /* size of this structure in bytes */ |
| 102 | uint32_t attr; /* attributes: unused bits SBZ */ |
| 103 | }; |
| 104 | |
| 105 | /***************************************************************************** |
| 106 | * This structure represents the superset of information needed while |
| 107 | * switching exception levels. The only two mechanisms to do so are |
| 108 | * ERET & SMC. Security state is indicated using bit zero of header |
| 109 | * attribute |
| 110 | * NOTE: BL1 expects entrypoint followed by spsr at an offset from the start |
| 111 | * of this structure defined by the macro `ENTRY_POINT_INFO_PC_OFFSET` while |
| 112 | * processing SMC to jump to BL31. |
| 113 | *****************************************************************************/ |
| 114 | struct entry_point_info { |
| 115 | struct param_header h; |
| 116 | uintptr_t pc; |
| 117 | uint32_t spsr; |
| 118 | struct aapcs64_params args; |
| 119 | }; |
| 120 | |
| 121 | /***************************************************************************** |
| 122 | * Image info binary provides information from the image loader that |
| 123 | * can be used by the firmware to manage available trusted RAM. |
| 124 | * More advanced firmware image formats can provide additional |
| 125 | * information that enables optimization or greater flexibility in the |
| 126 | * common firmware code |
| 127 | *****************************************************************************/ |
| 128 | struct atf_image_info { |
| 129 | struct param_header h; |
| 130 | uintptr_t image_base; /* physical address of base of image */ |
| 131 | uint32_t image_size; /* bytes read from image file */ |
Michael Walle | afaf6ea | 2020-11-18 17:45:58 +0100 | [diff] [blame] | 132 | #if CONFIG_IS_ENABLED(ATF_LOAD_IMAGE_V2) |
| 133 | uint32_t image_max_size; |
| 134 | #endif |
Kever Yang | 6e79a91 | 2017-05-05 11:47:45 +0800 | [diff] [blame] | 135 | }; |
| 136 | |
| 137 | /***************************************************************************** |
| 138 | * The image descriptor struct definition. |
| 139 | *****************************************************************************/ |
| 140 | struct image_desc { |
| 141 | /* Contains unique image id for the image. */ |
| 142 | unsigned int image_id; |
| 143 | /* |
| 144 | * This member contains Image state information. |
| 145 | * Refer IMAGE_STATE_XXX defined above. |
| 146 | */ |
| 147 | unsigned int state; |
| 148 | uint32_t copied_size; /* image size copied in blocks */ |
| 149 | struct atf_image_info atf_image_info; |
| 150 | struct entry_point_info ep_info; |
| 151 | }; |
| 152 | |
| 153 | /******************************************************************************* |
| 154 | * This structure represents the superset of information that can be passed to |
| 155 | * BL31 e.g. while passing control to it from BL2. The BL32 parameters will be |
| 156 | * populated only if BL2 detects its presence. A pointer to a structure of this |
| 157 | * type should be passed in X0 to BL31's cold boot entrypoint. |
| 158 | * |
| 159 | * Use of this structure and the X0 parameter is not mandatory: the BL31 |
| 160 | * platform code can use other mechanisms to provide the necessary information |
| 161 | * about BL32 and BL33 to the common and SPD code. |
| 162 | * |
| 163 | * BL31 image information is mandatory if this structure is used. If either of |
| 164 | * the optional BL32 and BL33 image information is not provided, this is |
| 165 | * indicated by the respective image_info pointers being zero. |
| 166 | ******************************************************************************/ |
| 167 | struct bl31_params { |
| 168 | struct param_header h; |
| 169 | struct atf_image_info *bl31_image_info; |
| 170 | struct entry_point_info *bl32_ep_info; |
| 171 | struct atf_image_info *bl32_image_info; |
| 172 | struct entry_point_info *bl33_ep_info; |
| 173 | struct atf_image_info *bl33_image_info; |
| 174 | }; |
| 175 | |
Michael Walle | afaf6ea | 2020-11-18 17:45:58 +0100 | [diff] [blame] | 176 | /* BL image node in the BL image execution sequence */ |
| 177 | struct bl_params_node { |
| 178 | unsigned int image_id; |
| 179 | struct atf_image_info *image_info; |
| 180 | struct entry_point_info *ep_info; |
| 181 | struct bl_params_node *next_params_info; |
| 182 | }; |
| 183 | |
| 184 | /* |
| 185 | * BL image head node in the BL image execution sequence |
| 186 | * It is also used to pass information to next BL image. |
| 187 | */ |
| 188 | struct bl_params { |
| 189 | struct param_header h; |
| 190 | struct bl_params_node *head; |
| 191 | }; |
| 192 | |
| 193 | #define for_each_bl_params_node(bl_params, node) \ |
| 194 | for ((node) = (bl_params)->head; \ |
| 195 | (node); \ |
| 196 | (node) = (node)->next_params_info) |
Kever Yang | 6e79a91 | 2017-05-05 11:47:45 +0800 | [diff] [blame] | 197 | |
Simon Glass | 559f1a8 | 2020-05-10 11:40:12 -0600 | [diff] [blame] | 198 | #endif /*__ASSEMBLY__ */ |
Kever Yang | 6e79a91 | 2017-05-05 11:47:45 +0800 | [diff] [blame] | 199 | |
| 200 | #endif /* __BL_COMMON_H__ */ |