Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Peter Griffin | af0c1be | 2015-07-30 18:55:22 +0100 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2015 Linaro |
| 4 | * peter.griffin <peter.griffin@linaro.org> |
Peter Griffin | af0c1be | 2015-07-30 18:55:22 +0100 | [diff] [blame] | 5 | */ |
| 6 | |
Yang Xiwen | 0425947 | 2024-02-01 22:05:42 +0800 | [diff] [blame] | 7 | #include <clk.h> |
Manivannan Sadhasivam | 6ad4f8c | 2018-12-27 19:04:04 +0530 | [diff] [blame] | 8 | #include <dm.h> |
Peter Griffin | af0c1be | 2015-07-30 18:55:22 +0100 | [diff] [blame] | 9 | #include <dwmmc.h> |
Manivannan Sadhasivam | 6ad4f8c | 2018-12-27 19:04:04 +0530 | [diff] [blame] | 10 | #include <errno.h> |
| 11 | #include <fdtdec.h> |
Peter Griffin | af0c1be | 2015-07-30 18:55:22 +0100 | [diff] [blame] | 12 | #include <malloc.h> |
Yang Xiwen | 0425947 | 2024-02-01 22:05:42 +0800 | [diff] [blame] | 13 | #include <reset.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 14 | #include <asm/global_data.h> |
Yang Xiwen | 0425947 | 2024-02-01 22:05:42 +0800 | [diff] [blame] | 15 | #include <dm/device_compat.h> |
Peter Griffin | af0c1be | 2015-07-30 18:55:22 +0100 | [diff] [blame] | 16 | |
Manivannan Sadhasivam | 6ad4f8c | 2018-12-27 19:04:04 +0530 | [diff] [blame] | 17 | DECLARE_GLOBAL_DATA_PTR; |
Peter Griffin | af0c1be | 2015-07-30 18:55:22 +0100 | [diff] [blame] | 18 | |
Yang Xiwen | 0425947 | 2024-02-01 22:05:42 +0800 | [diff] [blame] | 19 | enum hi6220_dwmmc_clk_type { |
| 20 | HI6220_DWMMC_CLK_BIU, |
| 21 | HI6220_DWMMC_CLK_CIU, |
| 22 | HI6220_DWMMC_CLK_CNT, |
| 23 | }; |
| 24 | |
Manivannan Sadhasivam | 6ad4f8c | 2018-12-27 19:04:04 +0530 | [diff] [blame] | 25 | struct hi6220_dwmmc_plat { |
| 26 | struct mmc_config cfg; |
| 27 | struct mmc mmc; |
| 28 | }; |
Peter Griffin | af0c1be | 2015-07-30 18:55:22 +0100 | [diff] [blame] | 29 | |
Manivannan Sadhasivam | 6ad4f8c | 2018-12-27 19:04:04 +0530 | [diff] [blame] | 30 | struct hi6220_dwmmc_priv_data { |
| 31 | struct dwmci_host host; |
Yang Xiwen | 0425947 | 2024-02-01 22:05:42 +0800 | [diff] [blame] | 32 | struct clk *clks[HI6220_DWMMC_CLK_CNT]; |
| 33 | struct reset_ctl_bulk rsts; |
Manivannan Sadhasivam | 6ad4f8c | 2018-12-27 19:04:04 +0530 | [diff] [blame] | 34 | }; |
Peter Griffin | af0c1be | 2015-07-30 18:55:22 +0100 | [diff] [blame] | 35 | |
Manivannan Sadhasivam | 759c45a | 2019-08-02 20:40:10 +0530 | [diff] [blame] | 36 | struct hisi_mmc_data { |
| 37 | unsigned int clock; |
| 38 | bool use_fifo; |
Sam Protsenko | 751fdf1 | 2024-08-07 22:14:17 -0500 | [diff] [blame] | 39 | u32 fifo_depth; |
Manivannan Sadhasivam | 759c45a | 2019-08-02 20:40:10 +0530 | [diff] [blame] | 40 | }; |
| 41 | |
Simon Glass | aad29ae | 2020-12-03 16:55:21 -0700 | [diff] [blame] | 42 | static int hi6220_dwmmc_of_to_plat(struct udevice *dev) |
Peter Griffin | af0c1be | 2015-07-30 18:55:22 +0100 | [diff] [blame] | 43 | { |
Manivannan Sadhasivam | 6ad4f8c | 2018-12-27 19:04:04 +0530 | [diff] [blame] | 44 | struct hi6220_dwmmc_priv_data *priv = dev_get_priv(dev); |
| 45 | struct dwmci_host *host = &priv->host; |
Yang Xiwen | 0425947 | 2024-02-01 22:05:42 +0800 | [diff] [blame] | 46 | int ret; |
Peter Griffin | af0c1be | 2015-07-30 18:55:22 +0100 | [diff] [blame] | 47 | |
Yang Xiwen | 0425947 | 2024-02-01 22:05:42 +0800 | [diff] [blame] | 48 | if (CONFIG_IS_ENABLED(CLK) && CONFIG_IS_ENABLED(DM_RESET)) { |
| 49 | priv->clks[HI6220_DWMMC_CLK_BIU] = devm_clk_get(dev, "biu"); |
| 50 | if (IS_ERR(priv->clks[HI6220_DWMMC_CLK_BIU])) { |
| 51 | ret = PTR_ERR(priv->clks[HI6220_DWMMC_CLK_BIU]); |
| 52 | dev_err(dev, "Failed to get BIU clock(ret = %d).\n", ret); |
| 53 | return log_msg_ret("clk", ret); |
| 54 | } |
| 55 | |
| 56 | priv->clks[HI6220_DWMMC_CLK_CIU] = devm_clk_get(dev, "ciu"); |
| 57 | if (IS_ERR(priv->clks[HI6220_DWMMC_CLK_CIU])) { |
| 58 | ret = PTR_ERR(priv->clks[HI6220_DWMMC_CLK_CIU]); |
| 59 | dev_err(dev, "Failed to get CIU clock(ret = %d).\n", ret); |
| 60 | return log_msg_ret("clk", ret); |
| 61 | } |
| 62 | |
| 63 | ret = reset_get_bulk(dev, &priv->rsts); |
| 64 | if (ret) { |
| 65 | dev_err(dev, "Failed to get resets(ret = %d)", ret); |
| 66 | return log_msg_ret("rst", ret); |
| 67 | } |
| 68 | } |
Manivannan Sadhasivam | 6ad4f8c | 2018-12-27 19:04:04 +0530 | [diff] [blame] | 69 | host->name = dev->name; |
Masahiro Yamada | 1096ae1 | 2020-07-17 14:36:46 +0900 | [diff] [blame] | 70 | host->ioaddr = dev_read_addr_ptr(dev); |
Manivannan Sadhasivam | 6ad4f8c | 2018-12-27 19:04:04 +0530 | [diff] [blame] | 71 | host->buswidth = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), |
| 72 | "bus-width", 4); |
Peter Griffin | af0c1be | 2015-07-30 18:55:22 +0100 | [diff] [blame] | 73 | |
Manivannan Sadhasivam | 6ad4f8c | 2018-12-27 19:04:04 +0530 | [diff] [blame] | 74 | /* use non-removable property for differentiating SD card and eMMC */ |
| 75 | if (dev_read_bool(dev, "non-removable")) |
| 76 | host->dev_index = 0; |
| 77 | else |
| 78 | host->dev_index = 1; |
| 79 | |
| 80 | host->priv = priv; |
| 81 | |
Peter Griffin | af0c1be | 2015-07-30 18:55:22 +0100 | [diff] [blame] | 82 | return 0; |
| 83 | } |
| 84 | |
Manivannan Sadhasivam | 6ad4f8c | 2018-12-27 19:04:04 +0530 | [diff] [blame] | 85 | static int hi6220_dwmmc_probe(struct udevice *dev) |
Peter Griffin | af0c1be | 2015-07-30 18:55:22 +0100 | [diff] [blame] | 86 | { |
Simon Glass | fa20e93 | 2020-12-03 16:55:20 -0700 | [diff] [blame] | 87 | struct hi6220_dwmmc_plat *plat = dev_get_plat(dev); |
Manivannan Sadhasivam | 6ad4f8c | 2018-12-27 19:04:04 +0530 | [diff] [blame] | 88 | struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); |
| 89 | struct hi6220_dwmmc_priv_data *priv = dev_get_priv(dev); |
| 90 | struct dwmci_host *host = &priv->host; |
Manivannan Sadhasivam | 759c45a | 2019-08-02 20:40:10 +0530 | [diff] [blame] | 91 | struct hisi_mmc_data *mmc_data; |
Yang Xiwen | 0425947 | 2024-02-01 22:05:42 +0800 | [diff] [blame] | 92 | int ret; |
Manivannan Sadhasivam | 759c45a | 2019-08-02 20:40:10 +0530 | [diff] [blame] | 93 | |
| 94 | mmc_data = (struct hisi_mmc_data *)dev_get_driver_data(dev); |
Manivannan Sadhasivam | 6ad4f8c | 2018-12-27 19:04:04 +0530 | [diff] [blame] | 95 | |
Manivannan Sadhasivam | 759c45a | 2019-08-02 20:40:10 +0530 | [diff] [blame] | 96 | host->bus_hz = mmc_data->clock; |
Yang Xiwen | 0425947 | 2024-02-01 22:05:42 +0800 | [diff] [blame] | 97 | if (CONFIG_IS_ENABLED(CLK) && CONFIG_IS_ENABLED(DM_RESET)) { |
| 98 | ret = clk_prepare_enable(priv->clks[HI6220_DWMMC_CLK_BIU]); |
| 99 | if (ret) { |
| 100 | dev_err(dev, "Failed to enable biu clock(ret = %d).\n", ret); |
| 101 | return log_msg_ret("clk", ret); |
| 102 | } |
| 103 | |
| 104 | ret = clk_prepare_enable(priv->clks[HI6220_DWMMC_CLK_CIU]); |
| 105 | if (ret) { |
| 106 | dev_err(dev, "Failed to enable ciu clock(ret = %d).\n", ret); |
| 107 | return log_msg_ret("clk", ret); |
| 108 | } |
| 109 | |
| 110 | ret = reset_deassert_bulk(&priv->rsts); |
| 111 | if (ret) { |
| 112 | dev_err(dev, "Failed to deassert resets(ret = %d).\n", ret); |
| 113 | return log_msg_ret("rst", ret); |
| 114 | } |
| 115 | |
| 116 | host->bus_hz = clk_get_rate(priv->clks[HI6220_DWMMC_CLK_CIU]); |
| 117 | if (host->bus_hz <= 0) { |
| 118 | dev_err(dev, "Failed to get ciu clock rate(ret = %d).\n", ret); |
| 119 | return log_msg_ret("clk", ret); |
| 120 | } |
| 121 | } |
| 122 | dev_dbg(dev, "bus clock rate: %d.\n", host->bus_hz); |
Peter Griffin | af0c1be | 2015-07-30 18:55:22 +0100 | [diff] [blame] | 123 | |
Manivannan Sadhasivam | 6ad4f8c | 2018-12-27 19:04:04 +0530 | [diff] [blame] | 124 | dwmci_setup_cfg(&plat->cfg, host, host->bus_hz, 400000); |
| 125 | host->mmc = &plat->mmc; |
Peter Griffin | af0c1be | 2015-07-30 18:55:22 +0100 | [diff] [blame] | 126 | |
Manivannan Sadhasivam | 759c45a | 2019-08-02 20:40:10 +0530 | [diff] [blame] | 127 | host->fifo_mode = mmc_data->use_fifo; |
Sam Protsenko | 751fdf1 | 2024-08-07 22:14:17 -0500 | [diff] [blame] | 128 | host->fifo_depth = mmc_data->fifo_depth; |
Manivannan Sadhasivam | 6ad4f8c | 2018-12-27 19:04:04 +0530 | [diff] [blame] | 129 | host->mmc->priv = &priv->host; |
| 130 | upriv->mmc = host->mmc; |
| 131 | host->mmc->dev = dev; |
Peter Griffin | af0c1be | 2015-07-30 18:55:22 +0100 | [diff] [blame] | 132 | |
Manivannan Sadhasivam | 6ad4f8c | 2018-12-27 19:04:04 +0530 | [diff] [blame] | 133 | return dwmci_probe(dev); |
Peter Griffin | af0c1be | 2015-07-30 18:55:22 +0100 | [diff] [blame] | 134 | } |
Manivannan Sadhasivam | 6ad4f8c | 2018-12-27 19:04:04 +0530 | [diff] [blame] | 135 | |
| 136 | static int hi6220_dwmmc_bind(struct udevice *dev) |
| 137 | { |
Simon Glass | fa20e93 | 2020-12-03 16:55:20 -0700 | [diff] [blame] | 138 | struct hi6220_dwmmc_plat *plat = dev_get_plat(dev); |
Manivannan Sadhasivam | 6ad4f8c | 2018-12-27 19:04:04 +0530 | [diff] [blame] | 139 | int ret; |
| 140 | |
| 141 | ret = dwmci_bind(dev, &plat->mmc, &plat->cfg); |
| 142 | if (ret) |
| 143 | return ret; |
| 144 | |
| 145 | return 0; |
| 146 | } |
| 147 | |
Manivannan Sadhasivam | 759c45a | 2019-08-02 20:40:10 +0530 | [diff] [blame] | 148 | static const struct hisi_mmc_data hi3660_mmc_data = { |
| 149 | .clock = 3200000, |
| 150 | .use_fifo = true, |
| 151 | }; |
| 152 | |
| 153 | static const struct hisi_mmc_data hi6220_mmc_data = { |
| 154 | .clock = 50000000, |
| 155 | .use_fifo = false, |
| 156 | }; |
| 157 | |
Yang Xiwen | e52d3c0 | 2024-02-01 22:05:44 +0800 | [diff] [blame] | 158 | static const struct hisi_mmc_data hi3798mv2x_mmc_data = { |
| 159 | .clock = 50000000, |
| 160 | .use_fifo = false, |
Sam Protsenko | 751fdf1 | 2024-08-07 22:14:17 -0500 | [diff] [blame] | 161 | .fifo_depth = 256, |
Yang Xiwen | e52d3c0 | 2024-02-01 22:05:44 +0800 | [diff] [blame] | 162 | }; |
| 163 | |
Manivannan Sadhasivam | 6ad4f8c | 2018-12-27 19:04:04 +0530 | [diff] [blame] | 164 | static const struct udevice_id hi6220_dwmmc_ids[] = { |
Manivannan Sadhasivam | 759c45a | 2019-08-02 20:40:10 +0530 | [diff] [blame] | 165 | { .compatible = "hisilicon,hi6220-dw-mshc", |
| 166 | .data = (ulong)&hi6220_mmc_data }, |
| 167 | { .compatible = "hisilicon,hi3798cv200-dw-mshc", |
| 168 | .data = (ulong)&hi6220_mmc_data }, |
Yang Xiwen | 464c2be | 2023-04-01 19:17:34 +0800 | [diff] [blame] | 169 | { .compatible = "hisilicon,hi3798mv200-dw-mshc", |
Yang Xiwen | e52d3c0 | 2024-02-01 22:05:44 +0800 | [diff] [blame] | 170 | .data = (ulong)&hi3798mv2x_mmc_data }, |
Manivannan Sadhasivam | 759c45a | 2019-08-02 20:40:10 +0530 | [diff] [blame] | 171 | { .compatible = "hisilicon,hi3660-dw-mshc", |
| 172 | .data = (ulong)&hi3660_mmc_data }, |
Manivannan Sadhasivam | 6ad4f8c | 2018-12-27 19:04:04 +0530 | [diff] [blame] | 173 | { } |
| 174 | }; |
| 175 | |
| 176 | U_BOOT_DRIVER(hi6220_dwmmc_drv) = { |
| 177 | .name = "hi6220_dwmmc", |
| 178 | .id = UCLASS_MMC, |
| 179 | .of_match = hi6220_dwmmc_ids, |
Simon Glass | aad29ae | 2020-12-03 16:55:21 -0700 | [diff] [blame] | 180 | .of_to_plat = hi6220_dwmmc_of_to_plat, |
Manivannan Sadhasivam | 6ad4f8c | 2018-12-27 19:04:04 +0530 | [diff] [blame] | 181 | .ops = &dm_dwmci_ops, |
| 182 | .bind = hi6220_dwmmc_bind, |
| 183 | .probe = hi6220_dwmmc_probe, |
Simon Glass | 8a2b47f | 2020-12-03 16:55:17 -0700 | [diff] [blame] | 184 | .priv_auto = sizeof(struct hi6220_dwmmc_priv_data), |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 185 | .plat_auto = sizeof(struct hi6220_dwmmc_plat), |
Manivannan Sadhasivam | 6ad4f8c | 2018-12-27 19:04:04 +0530 | [diff] [blame] | 186 | }; |