| Marcel Ziswiler | 64e36c1 | 2022-07-21 15:27:30 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 OR MIT |
| 2 | // |
| 3 | // Copyright 2017 Armadeus Systems <support@armadeus.com> |
| Sébastien Szymanski | a7762e4 | 2017-03-07 14:33:25 +0100 | [diff] [blame] | 4 | |
| 5 | /dts-v1/; |
| 6 | #include "imx6ul-opos6ul.dtsi" |
| Marcel Ziswiler | 64e36c1 | 2022-07-21 15:27:30 +0200 | [diff] [blame] | 7 | #include "imx6ul-imx6ull-opos6uldev.dtsi" |
| Sébastien Szymanski | a7762e4 | 2017-03-07 14:33:25 +0100 | [diff] [blame] | 8 | |
| 9 | / { |
| Marcel Ziswiler | 64e36c1 | 2022-07-21 15:27:30 +0200 | [diff] [blame] | 10 | model = "Armadeus Systems OPOS6UL SoM (i.MX6UL) on OPOS6ULDev board"; |
| 11 | compatible = "armadeus,imx6ul-opos6uldev", "armadeus,imx6ul-opos6ul", "fsl,imx6ul"; |
| Sébastien Szymanski | a7762e4 | 2017-03-07 14:33:25 +0100 | [diff] [blame] | 12 | }; |
| 13 | |
| Sébastien Szymanski | a7762e4 | 2017-03-07 14:33:25 +0100 | [diff] [blame] | 14 | &iomuxc { |
| Marcel Ziswiler | 64e36c1 | 2022-07-21 15:27:30 +0200 | [diff] [blame] | 15 | pinctrl-0 = <&pinctrl_gpios>, <&pinctrl_tamper_gpios>; |
| Sébastien Szymanski | a7762e4 | 2017-03-07 14:33:25 +0100 | [diff] [blame] | 16 | |
| Marcel Ziswiler | 64e36c1 | 2022-07-21 15:27:30 +0200 | [diff] [blame] | 17 | pinctrl_tamper_gpios: tampergpiosgrp { |
| Sébastien Szymanski | a7762e4 | 2017-03-07 14:33:25 +0100 | [diff] [blame] | 18 | fsl,pins = < |
| Sébastien Szymanski | a7762e4 | 2017-03-07 14:33:25 +0100 | [diff] [blame] | 19 | MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x0b0b0 |
| 20 | MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x0b0b0 |
| 21 | MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x0b0b0 |
| 22 | MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x0b0b0 |
| 23 | MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0b0b0 |
| 24 | MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x0b0b0 |
| 25 | MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x0b0b0 |
| 26 | MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x0b0b0 |
| 27 | >; |
| 28 | }; |
| 29 | |
| Sébastien Szymanski | a7762e4 | 2017-03-07 14:33:25 +0100 | [diff] [blame] | 30 | pinctrl_usbotg2_vbus: usbotg2vbusgrp { |
| 31 | fsl,pins = < |
| 32 | MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x1b0b0 |
| 33 | >; |
| 34 | }; |
| 35 | |
| 36 | pinctrl_w1: w1grp { |
| 37 | fsl,pins = < |
| 38 | MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x0b0b0 |
| 39 | >; |
| 40 | }; |
| 41 | }; |