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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Angelo Dureghello67c4e482017-08-07 01:17:18 +02002/*
3 * Sysam stmark2 board configuration
4 *
5 * (C) Copyright 2017 Angelo Dureghello <angelo@sysam.it>
Angelo Dureghello67c4e482017-08-07 01:17:18 +02006 */
7
8#ifndef __STMARK2_CONFIG_H
9#define __STMARK2_CONFIG_H
10
Mario Six790d8442018-03-28 14:38:20 +020011#define CONFIG_HOSTNAME "stmark2"
Angelo Dureghello67c4e482017-08-07 01:17:18 +020012
Angelo Dureghello67c4e482017-08-07 01:17:18 +020013#define CONFIG_SYS_UART_PORT 0
Angelo Dureghello67c4e482017-08-07 01:17:18 +020014
15#define LDS_BOARD_TEXT \
16 board/sysam/stmark2/sbf_dram_init.o (.text*)
17
Angelo Dureghello67c4e482017-08-07 01:17:18 +020018#define CONFIG_EXTRA_ENV_SETTINGS \
19 "kern_size=0x700000\0" \
20 "loadaddr=0x40001000\0" \
21 "-(rootfs)\0" \
22 "update_uboot=loady ${loadaddr}; " \
23 "sf probe 0:1 50000000; " \
24 "sf erase 0 0x80000; " \
25 "sf write ${loadaddr} 0 ${filesize}\0" \
26 "update_kernel=loady ${loadaddr}; " \
27 "setenv kern_size ${filesize}; saveenv; " \
28 "sf probe 0:1 50000000; " \
29 "sf erase 0x100000 0x700000; " \
30 "sf write ${loadaddr} 0x100000 ${filesize}\0" \
31 "update_rootfs=loady ${loadaddr}; " \
32 "sf probe 0:1 50000000; " \
33 "sf erase 0x00800000 0x100000; " \
34 "sf write ${loadaddr} 0x00800000 ${filesize}\0" \
35 ""
36
37/* Realtime clock */
38#undef CONFIG_MCFRTC
39#define CONFIG_RTC_MCFRRTC
40#define CONFIG_SYS_MCFRRTC_BASE 0xFC0A8000
41
Angelo Dureghello67c4e482017-08-07 01:17:18 +020042/* Timer */
43#define CONFIG_MCFTMR
Angelo Dureghello67c4e482017-08-07 01:17:18 +020044
45/* DSPI and Serial Flash */
Angelo Dureghello67c4e482017-08-07 01:17:18 +020046#define CONFIG_SERIAL_FLASH
Angelo Dureghello67c4e482017-08-07 01:17:18 +020047
48#define CONFIG_SYS_SBFHDR_SIZE 0x7
49
Angelo Dureghello67c4e482017-08-07 01:17:18 +020050/* Input, PCI, Flexbus, and VCO */
51#define CONFIG_EXTRA_CLOCK
52
53#define CONFIG_PRAM 2048 /* 2048 KB */
Angelo Dureghello67c4e482017-08-07 01:17:18 +020054#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
55
56/* Print Buffer Size */
57#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
58 sizeof(CONFIG_SYS_PROMPT) + 16)
59#define CONFIG_SYS_MAXARGS 16
60/* Boot Argument Buffer Size */
61#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
62
Angelo Dureghello67c4e482017-08-07 01:17:18 +020063#define CONFIG_SYS_MBAR 0xFC000000
64
65/*
66 * Definitions for initial stack pointer and data area (in internal SRAM)
67 */
68#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
69/* End of used area in internal SRAM */
70#define CONFIG_SYS_INIT_RAM_SIZE 0x10000
71#define CONFIG_SYS_INIT_RAM_CTRL 0x221
72#define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - \
73 GENERATED_GBL_DATA_SIZE) - 32)
74#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
75#define CONFIG_SYS_SBFHDR_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - 32)
76
77/*
78 * Start addresses for the final memory configuration
79 * (Set up by the startup code)
80 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
81 */
82#define CONFIG_SYS_SDRAM_BASE 0x40000000
83#define CONFIG_SYS_SDRAM_SIZE 128 /* SDRAM size in MB */
84
Angelo Dureghello67c4e482017-08-07 01:17:18 +020085#define CONFIG_SYS_DRAM_TEST
86
87#if defined(CONFIG_CF_SBF)
88#define CONFIG_SERIAL_BOOT
89#endif
90
91#if defined(CONFIG_SERIAL_BOOT)
92#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)
93#else
94#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
95#endif
96
97#define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024)
98/* Reserve 256 kB for Monitor */
99#define CONFIG_SYS_MONITOR_LEN (256 << 10)
Angelo Dureghello67c4e482017-08-07 01:17:18 +0200100
101/*
102 * For booting Linux, the board info and command line data
103 * have to be in the first 8 MB of memory, since this is
104 * the maximum mapped by the Linux kernel during initialization ??
105 */
106/* Initial Memory map for Linux */
107#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \
108 (CONFIG_SYS_SDRAM_SIZE << 20))
109
110/* Configuration for environment
111 * Environment is embedded in u-boot in the second sector of the flash
112 */
113
Angelo Dureghello67c4e482017-08-07 01:17:18 +0200114/* Cache Configuration */
Angelo Dureghello67c4e482017-08-07 01:17:18 +0200115#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
116 CONFIG_SYS_INIT_RAM_SIZE - 8)
117#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
118 CONFIG_SYS_INIT_RAM_SIZE - 4)
119#define CONFIG_SYS_ICACHE_INV (CF_CACR_BCINVA + CF_CACR_ICINVA)
120#define CONFIG_SYS_DCACHE_INV (CF_CACR_DCINVA)
121#define CONFIG_SYS_CACHE_ACR2 (CONFIG_SYS_SDRAM_BASE | \
122 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
123 CF_ACR_EN | CF_ACR_SM_ALL)
124#define CONFIG_SYS_CACHE_ICACR (CF_CACR_BEC | CF_CACR_IEC | \
125 CF_CACR_ICINVA | CF_CACR_EUSP)
126#define CONFIG_SYS_CACHE_DCACR ((CONFIG_SYS_CACHE_ICACR | \
127 CF_CACR_DEC | CF_CACR_DDCM_P | \
128 CF_CACR_DCINVA) & ~CF_CACR_ICINVA)
129
130#define CACR_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
131 CONFIG_SYS_INIT_RAM_SIZE - 12)
132
Angelo Durgehello68d46ad2019-11-15 23:54:15 +0100133#ifdef CONFIG_MCFFEC
Angelo Durgehello68d46ad2019-11-15 23:54:15 +0100134#define CONFIG_SYS_DISCOVER_PHY
Angelo Durgehello68d46ad2019-11-15 23:54:15 +0100135/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
136#ifndef CONFIG_SYS_DISCOVER_PHY
137#define FECDUPLEX FULL
138#define FECSPEED _100BASET
Angelo Durgehello68d46ad2019-11-15 23:54:15 +0100139#endif /* CONFIG_SYS_DISCOVER_PHY */
140#endif
Angelo Dureghello67c4e482017-08-07 01:17:18 +0200141#endif /* __STMARK2_CONFIG_H */