blob: 42f52d4d99a6e3993b454f81c9d8373f06271375 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0
Simon Glass9d5d1cc2015-08-30 16:55:42 -06002/*
3 * Google Veyron Jerry Rev 3+ board device tree source
4 *
5 * Copyright 2014 Google, Inc
Simon Glass9d5d1cc2015-08-30 16:55:42 -06006 */
7
8/dts-v1/;
9#include "rk3288-veyron-chromebook.dtsi"
10#include "cros-ec-sbs.dtsi"
11
12/ {
13 model = "Google Jerry";
14 compatible = "google,veyron-jerry-rev7", "google,veyron-jerry-rev6",
15 "google,veyron-jerry-rev5", "google,veyron-jerry-rev4",
16 "google,veyron-jerry-rev3", "google,veyron-jerry",
17 "google,veyron", "rockchip,rk3288";
18
19 chosen {
20 stdout-path = &uart2;
21 };
22
Simon Glass63249682017-05-31 17:57:26 -060023 panel_regulator: panel-regulator {
Simon Glass9d5d1cc2015-08-30 16:55:42 -060024 compatible = "regulator-fixed";
25 enable-active-high;
26 gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>;
27 pinctrl-names = "default";
28 pinctrl-0 = <&lcd_enable_h>;
29 regulator-name = "panel_regulator";
30 vin-supply = <&vcc33_sys>;
31 };
32
33 vcc18_lcd: vcc18-lcd {
34 compatible = "regulator-fixed";
35 enable-active-high;
36 gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
37 pinctrl-names = "default";
38 pinctrl-0 = <&avdd_1v8_disp_en>;
39 regulator-name = "vcc18_lcd";
40 regulator-always-on;
41 regulator-boot-on;
42 vin-supply = <&vcc18_wl>;
43 };
44
45 backlight_regulator: backlight-regulator {
46 compatible = "regulator-fixed";
47 enable-active-high;
48 gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
49 pinctrl-names = "default";
50 pinctrl-0 = <&bl_pwr_en>;
51 regulator-name = "backlight_regulator";
52 vin-supply = <&vcc33_sys>;
53 startup-delay-us = <15000>;
54 };
55};
56
Simon Glass0df19cd2016-11-13 14:22:12 -070057&dmc {
58 rockchip,pctl-timing = <0x29a 0xc8 0x1f4 0x42 0x4e 0x4 0xea 0xa
59 0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7
60 0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0
61 0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0
62 0x5 0x0>;
63 rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200
64 0xa60 0x40 0x10 0x0>;
65 rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>;
66};
67
Simon Glass9d5d1cc2015-08-30 16:55:42 -060068&gpio_keys {
69 power {
70 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
71 };
72};
73
74&backlight {
75 power-supply = <&backlight_regulator>;
76};
77
78&panel {
79 power-supply= <&panel_regulator>;
80};
81
82&rk808 {
83 pinctrl-names = "default";
84 pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
85 dvs-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>,
86 <&gpio7 15 GPIO_ACTIVE_HIGH>;
87
88 regulators {
89 mic_vcc: LDO_REG2 {
90 regulator-always-on;
91 regulator-boot-on;
92 regulator-min-microvolt = <1800000>;
93 regulator-max-microvolt = <1800000>;
94 regulator-name = "mic_vcc";
95 regulator-suspend-mem-disabled;
96 };
97 };
98};
99
100&sdmmc {
101 pinctrl-names = "default";
102 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
103 &sdmmc_bus4>;
104 disable-wp;
105};
106
107&vcc_5v {
108 enable-active-high;
109 gpio = <&gpio7 21 GPIO_ACTIVE_HIGH>;
110 pinctrl-names = "default";
111 pinctrl-0 = <&drv_5v>;
112};
113
114&vcc50_hdmi {
115 enable-active-high;
116 gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>;
117 pinctrl-names = "default";
118 pinctrl-0 = <&vcc50_hdmi_en>;
119};
120
Simon Glass9d5d1cc2015-08-30 16:55:42 -0600121&edp {
122 pinctrl-names = "default";
123 pinctrl-0 = <&edp_hpd>;
124};
125
126&pinctrl {
127 backlight {
128 bl_pwr_en: bl_pwr_en {
129 rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
130 };
131 };
132
133 buck-5v {
134 drv_5v: drv-5v {
135 rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
136 };
137 };
138
139 edp {
140 edp_hpd: edp_hpd {
141 rockchip,pins = <7 11 RK_FUNC_2 &pcfg_pull_down>;
142 };
143 };
144
145 emmc {
146 /* Make sure eMMC is not in reset */
147 emmc_deassert_reset: emmc-deassert-reset {
148 rockchip,pins = <2 9 RK_FUNC_GPIO &pcfg_pull_none>;
149 };
150 };
151
152 hdmi {
153 vcc50_hdmi_en: vcc50-hdmi-en {
154 rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
155 };
156 };
157
158 lcd {
159 lcd_enable_h: lcd-en {
160 rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
161 };
162
163 avdd_1v8_disp_en: avdd-1v8-disp-en {
164 rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
165 };
166 };
167
168 pmic {
169 dvs_1: dvs-1 {
170 rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
171 };
172
173 dvs_2: dvs-2 {
174 rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
175 };
176 };
177};
178
179&i2c4 {
180 status = "okay";
181
182 /*
183 * Trackpad pin control is shared between Elan and Synaptics devices
184 * so we have to pull it up to the bus level.
185 */
186 pinctrl-names = "default";
187 pinctrl-0 = <&i2c4_xfer &trackpad_int>;
188
189 trackpad@15 {
190 compatible = "elan,i2c_touchpad";
191 interrupt-parent = <&gpio7>;
192 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
193 /*
194 * Remove the inherited pinctrl settings to avoid clashing
195 * with bus-wide ones.
196 */
197 /delete-property/pinctrl-names;
198 /delete-property/pinctrl-0;
199 reg = <0x15>;
200 vcc-supply = <&vcc33_io>;
201 wakeup-source;
202 };
203
204 trackpad@2c {
205 compatible = "hid-over-i2c";
206 interrupt-parent = <&gpio7>;
207 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
208 reg = <0x2c>;
209 hid-descr-addr = <0x0020>;
210 vcc-supply = <&vcc33_io>;
211 wakeup-source;
212 };
213};