blob: 67d22d3768aa8ae7343cffeebcfdde89ed25cc2d [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright 2023 Emtop Embedded Solutions
4 */
5
6/dts-v1/;
7
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/leds/common.h>
10#include <dt-bindings/usb/pd.h>
11
12#include "imx8mm.dtsi"
13
14/ {
15 model = "Emtop Embedded Solutions i.MX8M Mini SOM-IMX8MMLPD4 SoM";
16 compatible = "ees,imx8mm-emtop-som", "fsl,imx8mm";
17
18 chosen {
19 stdout-path = &uart2;
20 };
21
22 leds {
23 compatible = "gpio-leds";
24 pinctrl-names = "default";
25 pinctrl-0 = <&pinctrl_gpio_led>;
26
27 led-0 {
28 function = LED_FUNCTION_POWER;
29 gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>;
30 linux,default-trigger = "heartbeat";
31 };
32 };
33};
34
35&A53_0 {
36 cpu-supply = <&buck2>;
37};
38
39&A53_1 {
40 cpu-supply = <&buck2>;
41};
42
43&A53_2 {
44 cpu-supply = <&buck2>;
45};
46
47&A53_3 {
48 cpu-supply = <&buck2>;
49};
50
51&i2c1 {
52 clock-frequency = <400000>;
53 pinctrl-names = "default";
54 pinctrl-0 = <&pinctrl_i2c1>;
55 status = "okay";
56
57 pmic@25 {
58 compatible = "nxp,pca9450c";
59 reg = <0x25>;
60 pinctrl-names = "default";
61 pinctrl-0 = <&pinctrl_pmic>;
62 interrupt-parent = <&gpio1>;
63 interrupts = <3 IRQ_TYPE_EDGE_RISING>;
64
65 regulators {
66 buck1: BUCK1 {
67 regulator-name = "BUCK1";
68 regulator-min-microvolt = <800000>;
69 regulator-max-microvolt = <1000000>;
70 regulator-boot-on;
71 regulator-always-on;
72 regulator-ramp-delay = <3125>;
73 };
74
75 buck2: BUCK2 {
76 regulator-name = "BUCK2";
77 regulator-min-microvolt = <800000>;
78 regulator-max-microvolt = <900000>;
79 regulator-boot-on;
80 regulator-always-on;
81 regulator-ramp-delay = <3125>;
82 };
83
84 buck3: BUCK3 {
85 regulator-name = "BUCK3";
86 regulator-min-microvolt = <800000>;
87 regulator-max-microvolt = <1000000>;
88 regulator-boot-on;
89 regulator-always-on;
90 };
91
92 buck4: BUCK4 {
93 regulator-name = "BUCK4";
94 regulator-min-microvolt = <3000000>;
95 regulator-max-microvolt = <3600000>;
96 regulator-boot-on;
97 regulator-always-on;
98 };
99
100 buck5: BUCK5 {
101 regulator-name = "BUCK5";
102 regulator-min-microvolt = <1650000>;
103 regulator-max-microvolt = <1950000>;
104 regulator-boot-on;
105 regulator-always-on;
106 };
107
108 buck6: BUCK6 {
109 regulator-name = "BUCK6";
110 regulator-min-microvolt = <1100000>;
111 regulator-max-microvolt = <1200000>;
112 regulator-boot-on;
113 regulator-always-on;
114 };
115
116 ldo1: LDO1 {
117 regulator-name = "LDO1";
118 regulator-min-microvolt = <1650000>;
119 regulator-max-microvolt = <1950000>;
120 regulator-boot-on;
121 regulator-always-on;
122 };
123
124 ldo2: LDO2 {
125 regulator-name = "LDO2";
126 regulator-min-microvolt = <800000>;
127 regulator-max-microvolt = <945000>;
128 regulator-boot-on;
129 regulator-always-on;
130 };
131
132 ldo3: LDO3 {
133 regulator-name = "LDO3";
134 regulator-min-microvolt = <1710000>;
135 regulator-max-microvolt = <1890000>;
136 regulator-boot-on;
137 regulator-always-on;
138 };
139
140 ldo4: LDO4 {
141 regulator-name = "LDO4";
142 regulator-min-microvolt = <810000>;
143 regulator-max-microvolt = <945000>;
144 regulator-boot-on;
145 regulator-always-on;
146 };
147
148 ldo5: LDO5 {
149 regulator-name = "LDO5";
150 regulator-min-microvolt = <1650000>;
151 regulator-max-microvolt = <3600000>;
152 };
153 };
154 };
155};
156
157&uart2 {
158 pinctrl-names = "default";
159 pinctrl-0 = <&pinctrl_uart2>;
160 status = "okay";
161};
162
163&usdhc3 {
164 pinctrl-names = "default", "state_100mhz", "state_200mhz";
165 pinctrl-0 = <&pinctrl_usdhc3>;
166 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
167 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
168 bus-width = <8>;
169 non-removable;
170 status = "okay";
171};
172
173&wdog1 {
174 pinctrl-names = "default";
175 pinctrl-0 = <&pinctrl_wdog>;
176 fsl,ext-reset-output;
177 status = "okay";
178};
179
180&iomuxc {
181 pinctrl_gpio_led: emtop-gpio-led-grp {
182 fsl,pins = <
183 MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16 0x19
184 MX8MM_IOMUXC_SAI3_RXC_GPIO4_IO29 0x19
185 >;
186 };
187
188 pinctrl_i2c1: emtop-i2c1-grp {
189 fsl,pins = <
190 MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
191 MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
192 >;
193 };
194
195 pinctrl_pmic: emtop-pmic-grp {
196 fsl,pins = <
197 MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41
198 >;
199 };
200
201 pinctrl_uart2: emtop-uart2-grp {
202 fsl,pins = <
203 MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
204 MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
205 >;
206 };
207
208 pinctrl_usdhc3: emtop-usdhc3-grp {
209 fsl,pins = <
210 MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190
211 MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0
212 MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0
213 MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0
214 MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
215 MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0
216 MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0
217 MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0
218 MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0
219 MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0
220 MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
221 >;
222 };
223
224 pinctrl_usdhc3_100mhz: emtop-usdhc3-100mhz-grp {
225 fsl,pins = <
226 MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194
227 MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
228 MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4
229 MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4
230 MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4
231 MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4
232 MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4
233 MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4
234 MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4
235 MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4
236 MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194
237 >;
238 };
239
240 pinctrl_usdhc3_200mhz: emtop-usdhc3-200mhz-grp {
241 fsl,pins = <
242 MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196
243 MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6
244 MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6
245 MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6
246 MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6
247 MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6
248 MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6
249 MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6
250 MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6
251 MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6
252 MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196
253 >;
254 };
255
256 pinctrl_wdog: emtop-wdog-grp {
257 fsl,pins = <
258 MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6
259 >;
260 };
261};